https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #7 from Eric Gallager ---
(In reply to Michael Meissner from comment #6)
> Created attachment 27206 [details]
> ivtops dump from subversion id 183934 (after regression)
Where are we supposed to be looking in this?
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #6 from Michael Meissner 2012-04-20
23:17:44 UTC ---
Created attachment 27206
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27206
ivtops dump from subversion id 183934 (after regression)
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #5 from rguenther at suse dot de
2011-09-27 08:57:33 UTC ---
On Tue, 27 Sep 2011, kirill.yukhin at intel dot com wrote:
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
>
> --- Comment #4 from Yukhin Kirill 2011-09-27
> 08:31:3
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #4 from Yukhin Kirill 2011-09-27
08:31:35 UTC ---
(In reply to comment #3)
> For 32bit only it seems. Supposedly a cost model issue, the register pressure
> will be higher and we have only half the number of SSE regs.
Richard, what'
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
Richard Guenther changed:
What|Removed |Added
Target||i?86-*-*
--- Comment #3 from Richard G
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #2 from Yukhin Kirill 2011-09-22
10:33:06 UTC ---
Here is optset details:
base=-static -O2 -ffast-math ("-m32 -msse2 -mfpmath=sse" if 32 bit mode)
peak=-static -O3 -funroll-loops -ffast-math ("-m32 -msse2 -mfpmath=sse" if 32
bit mode)
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #1 from Yukhin Kirill 2011-09-22
10:00:34 UTC ---
Checkin URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=177368
