subject:"\[Bug target\/64477\] \[4.9\/5 Regression\] x86 sse unnecessary GPR spill"

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-22 Thread uros at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #9 from uros at gcc dot gnu.org --- Author: uros Date: Thu Jan 22 20:25:23 2015 New Revision: 220012 URL: https://gcc.gnu.org/viewcvs?rev=220012&root=gcc&view=rev Log: 2015-22-01 Uros Bizjak PR target/64688 PR target/64477

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-22 Thread uros at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #8 from uros at gcc dot gnu.org --- Author: uros Date: Thu Jan 22 14:43:55 2015 New Revision: 22 URL: https://gcc.gnu.org/viewcvs?rev=22&root=gcc&view=rev Log: PR target/64688 PR target/64477 * config/i386/sse.md (

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-22 Thread ubizjak at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 Uroš Bizjak changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-21 Thread ubizjak at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 Uroš Bizjak changed: What|Removed |Added Keywords|missed-optimization, ra | Target|x86_64-*-*

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-21 Thread ubizjak at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #6 from Uroš Bizjak --- (In reply to Jakub Jelinek from comment #5) > Uros, your thoughts on this? All these *r are (were?) necessary for TARGET_INTER_UNIT_MOVES_{TO,FROM}_VEC to avoid allocating general reg, but to go through memory

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-21 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #5 from Jakub Jelinek --- Uros, your thoughts on this?

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-16 Thread vmakarov at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #4 from Vladimir Makarov --- It is hard for me to consider the PR RA fault. The pseudo 90 gets memory as its cost 3000 for DIREG (4000 for any general reg) and 2000 for memory. 2: r90:SI=di:SI REG_DEAD di:SI 8: r95:V4S

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-13 Thread vmakarov at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #3 from Vladimir Makarov --- I investigated this problem too. IRA in GCC-4.9 allocates memory to the pseudo in insn 2, then the memory slot is reloaded for insn 8. Post-reload optimization changes stack slot by register. GCC-4.8 IR