https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
--- Comment #7 from Yvan Roux ---
Author: yroux
Date: Thu Dec 4 13:25:10 2014
New Revision: 218358
URL: https://gcc.gnu.org/viewcvs?rev=218358&root=gcc&view=rev
Log:
gcc/
2014-12-04 Yvan Roux
Backport from trunk r215046.
2014-09-09
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
Ramana Radhakrishnan changed:
What|Removed |Added
Status|NEW |RESOLVED
CC|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
--- Comment #5 from ktkachov at gcc dot gnu.org ---
Author: ktkachov
Date: Tue Sep 9 10:15:46 2014
New Revision: 215046
URL: https://gcc.gnu.org/viewcvs?rev=215046&root=gcc&view=rev
Log:
[AArch64] PR 61749: Do not ICE in lane intrinsics when pas
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
ktkachov at gcc dot gnu.org changed:
What|Removed |Added
Assignee|jgreenhalgh at gcc dot gnu.org |ktkachov at gcc dot
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
--- Comment #3 from ktkachov at gcc dot gnu.org ---
vqdmlal_lane_s16 expects an immediate/literal lane number as the fourth
argument and the builtin expansion code in aarch64-builtins.c is actually
equipped to error out when given a variable (in t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
ktkachov at gcc dot gnu.org changed:
What|Removed |Added
CC||ktkachov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749
jgreenhalgh at gcc dot gnu.org changed:
What|Removed |Added
Target||aarch64*
Sta
