--- Comment #13 from bonzini at gnu dot org 2009-07-15 16:20 ---
For the record, it's actually somewhat related to PR39726 (a m68k
pessimization), not PR39715. However, because of the way combine canonicalizes
the resulting expression, the patch for that bug does not fix the testcase.
--- Comment #12 from rearnsha at gcc dot gnu dot org 2009-07-15 10:31
---
Fixed with:
http://gcc.gnu.org/ml/gcc-patches/2009-07/msg00848.html
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rearnsha at gcc dot gnu dot org changed:
What|Removed |Added
--- Comment #11 from rearnsha at gcc dot gnu dot org 2009-07-14 14:53
---
The following define_split works for this specific case, but it needs to be
made more generic (handling IOR and HImode variants).
It also needs reworking for big-endian -- that needs (subreg...3).
(define_split
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ramana at gcc dot gnu dot org changed:
What|Removed |Added
AssignedTo|unassigned at gcc dot gnu |ramana at gcc dot gnu dot
|dot org
--- Comment #10 from steven at gcc dot gnu dot org 2009-06-23 09:50 ---
Yes, this bug is indeed not related to bug 39715.
I have also verified that the SEE pass (sign-extend elimination, but also
should handle zero-extend) fails to handle this case. And that pass doesn't
exist anymore
--- Comment #9 from ramana at gcc dot gnu dot org 2009-06-23 09:16 ---
(In reply to comment #4)
> (In reply to comment #3)
> > Is this related to bug 39715?
> >
>
> Maybe.
>
39715 appears to be strictly a 4.5 missed optimization, but from comment #5 it
appears as though this is diffe
--- Comment #8 from ramana at gcc dot gnu dot org 2009-06-22 22:57 ---
(In reply to comment #5)
> Compiling with gcc 4.4.1 with options "-Os -mtune=cortex-a8" I get this:
Try with -mcpu=cortex-a8 . -mtune=cortex-a8 doesn't choose the cpu for that ,
insn selection for the arm port happe
--- Comment #7 from steven at gcc dot gnu dot org 2009-06-22 18:25 ---
see the uxtbs instead of the ands, that is...
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40487
--- Comment #6 from steven at gcc dot gnu dot org 2009-06-22 18:25 ---
I get the same code with 4.5-today as the code of comment #5. I configured for
--target=arm-eabi. Should I configure differently to see the shifts instead of
ands?
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id
--- Comment #5 from steven at gcc dot gnu dot org 2009-06-22 17:58 ---
Compiling with gcc 4.4.1 with options "-Os -mtune=cortex-a8" I get this:
.cpu arm7tdmi
.fpu softvfp
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.e
--- Comment #4 from rearnsha at gcc dot gnu dot org 2009-06-22 17:00
---
(In reply to comment #3)
> Is this related to bug 39715?
>
Maybe.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40487
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steven at gcc dot gnu dot org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Ever Confirmed|0 |1
Last reconfir
--- Comment #3 from steven at gcc dot gnu dot org 2009-06-22 16:36 ---
Is this related to bug 39715?
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40487
--- Comment #2 from steven at gcc dot gnu dot org 2009-06-18 14:00 ---
Why does the zero-bits machinery in combine not make these redundant extensions
go away?
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40487
--- Comment #1 from ramana at gcc dot gnu dot org 2009-06-18 12:58 ---
I'm not sure about the best way of fixing this without looking at bigger trees
at expand time or for combine to be able to do something smart about this one.
Essentially you fold the previous zero extension with the
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