https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
--- Comment #5 from Kewen Lin ---
Created attachment 59656
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59656&action=edit
WIP-patch for P8_VECTOR
I had a WIP patch for P8 VECTOR rework, it needs some more changes on bif and
rs6000_vecto
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
Kewen Lin changed:
What|Removed |Added
Assignee|linkw at gcc dot gnu.org |unassigned at gcc dot
gnu.org
--- C
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
--- Comment #3 from Segher Boessenkool ---
No, we do not want that.
There is a huge difference between MSR[VEC] and MSR[VSX]. People can just
write
out what they actually mean. TARGET_ALTIVEC and TARGET_VSX.
The insns here are mostly Vector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
--- Comment #2 from Peter Bergner ---
(In reply to Kewen Lin from comment #0)
> I think not having TARGET_P10_VECTOR isn't intentional, as we still allow
> -mno-vsx with -mcpu=power10. We have TARGET_P8_VECTOR and TARGET_P9_VECTOR
> for P8 and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
Kewen Lin changed:
What|Removed |Added
Target Milestone|--- |15.0
Target|
