[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-27 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #19 from Li Pan --- Thanks Juzhe. Here is another example - #include extern size_t get_new_vl (); size_t __attribute__((noinline)) get_vl (size_t *c) { size_t vl = c[0] + c[1]; return vl; }

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-27 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #18 from JuzheZhong --- (In reply to Li Pan from comment #17) > According to the V abi, looks like the asm code tries to save/restore the > callee-saved registers when there is a call in function body. > > | Name| ABI Mnemonic |

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-27 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #17 from Li Pan --- According to the V abi, looks like the asm code tries to save/restore the callee-saved registers when there is a call in function body. | Name| ABI Mnemonic | Meaning | Preserved across c

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-22 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #16 from JuzheZhong --- This issue is not fully fixed since the fixed patch only fixes ICE but there is a regression in codegen: https://godbolt.org/z/4nvxeqb6K Terrible codege: test(__rvv_uint64m4_t): addisp,sp,-16

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-16 Thread schwab--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 Andreas Schwab changed: What|Removed |Added Target Milestone|--- |14.0 Resolution|---

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-10 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #14 from GCC Commits --- The master branch has been updated by Pan Li : https://gcc.gnu.org/g:e40a3d86511efcea71e9eadde8fb9f96be52f790 commit r14-9908-ge40a3d86511efcea71e9eadde8fb9f96be52f790 Author: Pan Li Date: Thu Apr 11 09:

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #13 from Li Pan --- overriding TARGET_CLASS_LIKELY_SPILLED_P hook may not be a fix as it will generate sorts of spill for the below sample code. vbool2_t test_vmfge_vf_f16m8_b2(vfloat16m8_t op1, float16_t op2, size_t vl) { return

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #12 from Li Pan --- #include extern unsigned long get_vl (); #if 0 #else vint32m1_t test (vint32m1_t a) { unsigned b; return __riscv_vadd_vx_i32m1 (a, b, get_vl ()); // No ICE } vbool16_t test (vuint64m4_t a) { unsigned l

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #11 from Li Pan --- (In reply to Li Pan from comment #10) > The #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) > of the riscv backend doesn't honor vector mode. Then the below part > > 370 ...

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #10 from Li Pan --- The #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) of the riscv backend doesn't honor vector mode. Then the below part 370 if (!targetm.calls.function_value_regno_p

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #9 from Uroš Bizjak --- (In reply to Andrew Pinski from comment #2) > /* If we didn't see a full return value copy, verify that there >is a plausible reason for this. If some, but not all of the >

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-09 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #8 from Li Pan --- Find an even simpler code for reproduction. #include extern unsigned long get_vl (); vbool16_t test (vuint64m4_t a) { unsigned long b; return __riscv_vmsne_vx_u64m4_b16 (a, b, get_vl ()); } ../__RISC-V_INS

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #7 from Li Pan --- Looks this commit from bisect acc22d56e140220e7dc6c138918cb6754b6d1c0b, will take a look into it.

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #6 from JuzheZhong --- Definitely it is a regression: https://compiler-explorer.com/z/e68x5sT9h GCC 13.2 is ok, but GCC 14 ICE. I think you should bisect first.

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #5 from Li Pan --- (In reply to Kito Cheng from comment #4) > Reduced case: > ```c > typedef long c; > #pragma riscv intrinsic "vector" > template struct d {}; > struct e { > using f = d<0>; > }; > struct g { > using f = e::f; >

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #4 from Kito Cheng --- Reduced case: ```c typedef long c; #pragma riscv intrinsic "vector" template struct d {}; struct e { using f = d<0>; }; struct g { using f = e::f; }; template using h = g::f; template long k(d); vbool16_

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread pan2.li at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #3 from Li Pan --- Reproduced from my side too.

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #2 from Andrew Pinski --- /* If we didn't see a full return value copy, verify that there is a plausible reason for this. If some, but not all of the return register is likely spilled, we ca

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

2024-04-08 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 Kito Cheng changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0