[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-10 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 JuzheZhong changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-10 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #14 from CVS Commits --- The master branch has been updated by Pan Li : https://gcc.gnu.org/g:fb906061e10662280f602886c3659ac1c7522a37 commit r14-5326-gfb906061e10662280f602886c3659ac1c7522a37 Author: Juzhe-Zhong Date: Fri Nov 1

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #13 from JuzheZhong --- Hi, kito. https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635688.html Candidate patch to fix this. Could you comment and give more explanation to Richards since I don't think I can explain it bette

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #12 from Kito Cheng --- oh, yeah, you are right, it already take a5 to splat, so it's right, and as you said it must be VLMAX, unless it AVL prorogation for both splat and the following vadd.vv

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #11 from JuzheZhong --- Why the splat can't be VLMAX ? I think it must be VLMAX, otherwise, it could be wrong.

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #10 from Kito Cheng --- (In reply to JuzheZhong from comment #9) > I have a draft patch to fix it: > > foo: > ble a0,zero,.L5 > vsetvli a5,zero,e32,m1,ta,ma > vid.v v2 > .L3: > vsetvli a5,a0,e32,m1,ta,m

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #9 from JuzheZhong --- I have a draft patch to fix it: foo: ble a0,zero,.L5 vsetvli a5,zero,e32,m1,ta,ma vid.v v2 .L3: vsetvli a5,a0,e32,m1,ta,ma sllia4,a5,2 vle32.v v3,0(a1)

[Bug target/112438] RISC-V: Wrong auto-vectorization on induction variable of RVV

2023-11-08 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112438 --- Comment #8 from Kito Cheng --- > Oh. I understand it now. I think it's a bug. > > And.. I just take a look at my internal LLVM... > Also has same issue > > I think we need to adapt the Gimple IR here: > > _35 = .SELECT_VL (ivtmp_33,