https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110024
--- Comment #3 from d_vampile ---
(In reply to Andrew Pinski from comment #2)
> Which core is showing the difference here?
> Because some cores I know of, loading/storing using the FP registers is
> actually one cycle slower than using GPRs.
Yes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110024
d_vampile changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110024
Andrew Pinski changed:
What|Removed |Added
Status|UNCONFIRMED |WAITING
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110024
--- Comment #1 from d_vampile ---
It can be seen that the vector register (D0) is used before the modification,
and the common register (X0) is used after the modification.
