[Bug target/118057] New: RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 Bug ID: 118057 Summary: RISC-V: Can't vectorize load and store with zvl128b Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Compone

[Bug target/116125] New: RISC-V: Does not fully checking for overlapping memory regions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116125 Bug ID: 116125 Summary: RISC-V: Does not fully checking for overlapping memory regions Product: gcc Version: 14.1.0 Status: UNCONFIRMED Severity: normal

[Bug target/115995] RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115995 --- Comment #1 from Monk Chiang --- Another test, the compile option is "g++ -march=rv64gcv_zvl128b -mabi=lp64d -O3" #include #include #include using namespace std; int main () { std::vector data = {2, 2, 2, 2, 2, 2}; std::vector result

[Bug target/115995] New: RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115995 Bug ID: 115995 Summary: RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug target/115763] RISC-V: Use wrong SEW for vfmv.v.f when -march only has zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115763 --- Comment #8 from Monk Chiang --- Li Pan, I tested it without any errors, I think this issue has been fixed

[Bug target/115763] RISC-V: Use wrong SEW for vfmv.v.f when -march only has zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115763 --- Comment #7 from Monk Chiang --- (In reply to Li Pan from comment #6) > Seems no surprise. > > Monk Chiang, could you please help to double check if upstream has fixed > this issue ? Thanks. Sure, I will check it by enable zvfhmin.

[Bug target/115763] RISC-V: Use wrong SEW for vfmv.v.f when -march only has zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115763 --- Comment #2 from Monk Chiang --- Thanks Pan. Another test. It includes vfmv.v.f, vfmv.s.f compile option: -mabi=lp64d -march=rv64gcv_zfh_zvfhmin -O3 -ftree-vectorize -fno-vect-cost-model -S #include void f__Float16_int8_t (_Float16 *res

[Bug target/115763] New: RISC-V: Use wrong SEW for vfmv.v.f when -march only has zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115763 Bug ID: 115763 Summary: RISC-V: Use wrong SEW for vfmv.v.f when -march only has zvfhmin Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug target/115725] New: RISC-V: Use wrong AVL for rv64gcv_zfh_zvl512b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115725 Bug ID: 115725 Summary: RISC-V: Use wrong AVL for rv64gcv_zfh_zvl512b Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: ta

[Bug target/115456] RISC-V: ICE: unrecognizable insn with march=rv64gcv_zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115456 --- Comment #4 from Monk Chiang --- The test case, if add this option: -mrvv-vector-bits=zvl It has a new internal compiler error. compress_run-2.c:25:1: error: unrecognizable insn: 25 | } | ^ (insn 30 29 31 2 (set (reg:HF 156 [ _2 ])

[Bug c/115456] New: ICE: unrecognizable insn with march=rv64gcv_zvfhmin

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115456 Bug ID: 115456 Summary: ICE: unrecognizable insn with march=rv64gcv_zvfhmin Product: gcc Version: 14.1.0 Status: UNCONFIRMED Severity: normal Priority: P3 Compo