[Bug target/118460] [14/15 Regression] ICE on armv8.1-m.main with -mfloat-abi=hard

2025-01-17 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118460 --- Comment #6 from Richard Earnshaw --- Yes, that would work as a work-around. It's a bit of a hack though. The expectation is that we would use vsel for pretty much everything when it is available (particularly for fast-math), but we fail to

[Bug target/118460] [14/15 Regression] ICE on armv8.1-m.main with -mfloat-abi=hard

2025-01-17 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118460 --- Comment #4 from Richard Earnshaw --- arm_vsel_comparison_operator is rejecting the comparison (LT) because it is not one that the vsel instruction can handle. We should be reversing the order of operands to the compare instruction and then

[Bug lto/118136] Linking start code built with -flto with application where main signature does not match causes warning

2024-12-20 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118136 Richard Earnshaw changed: What|Removed |Added Resolution|INVALID |--- Last reconfirmed|

[Bug target/118089] [12/13/14/15 regression] arm thumb2 return sequence is suboptimal, especially at -O2

2024-12-17 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118089 --- Comment #1 from Richard Earnshaw --- > I suspect this is a consequence of moving to an rtl-based prologue. Or more accurately: epilogue. :)

[Bug target/118089] New: [12/13/14 regression] arm thumb2 return sequence is suboptimal, especially at -O2

2024-12-17 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118089 Bug ID: 118089 Summary: [12/13/14 regression] arm thumb2 return sequence is suboptimal, especially at -O2 Product: gcc Version: 4.8.0 Status: UNCONFIRMED Keywo

[Bug target/118008] [14/15 regression] ICE when bootstrapping with Go on arm (gen_movdi, at config/arm/arm.md:6296)

2024-12-16 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118008 --- Comment #11 from Richard Earnshaw --- For the bare metal cross you probably need to configure with '--with-arch=armv7-a+fp --with-float-abi=hard' If that still doesn't trigger it, try adding '--with-mode=thumb'

[Bug target/116447] g++.dg/cpp23/ext-floating13.C fails on Cortex-M55 due to undefined reference

2024-12-12 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116447 Richard Earnshaw changed: What|Removed |Added CC||clyon at gcc dot gnu.org,

[Bug target/117941] Partial backtrace on C++ exception on ARM

2024-12-09 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117941 --- Comment #5 from Richard Earnshaw --- > Is it then possible to have dwarf data on ARM in addition to the EABI defined > unwind section? I don't know, honesty, because I've not tried it. I'd be surprised if it worked though, at least, not wi

[Bug target/117941] Partial backtrace on C++ exception on ARM

2024-12-09 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117941 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/116625] [15 regression] regressions on arm-eabi since r15-1619-g3b9b8d6cfdf593

2024-12-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116625 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/116447] g++.dg/cpp23/ext-floating13.C fails on Cortex-M55 due to undefined reference

2024-12-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116447 --- Comment #1 from Richard Earnshaw --- How was the compiler configured and what's the full command line used when building the test?

[Bug target/117766] Confusion over whether ARM32 -march=armv8-a implies floating point support

2024-11-25 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117766 --- Comment #14 from Richard Earnshaw --- (In reply to Tom Lane from comment #13) > After further experimentation, it seems to me that: > > * There was a behavioral change between gcc 9.3.1 and the later releases I > tested. Specifically, in 9

[Bug target/114801] [14/15 Regression] arm: ICE in find_cached_value, at rtx-vector-builder.cc:100 with MVE intrinsics

2024-11-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114801 Richard Earnshaw changed: What|Removed |Added Keywords|ice-on-valid-code |ice-on-invalid-code --- Comment #40

[Bug testsuite/117419] test failures for enum-alias-{1,2,3} on arm-eabi

2024-11-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117419 --- Comment #4 from Richard Earnshaw --- enum size is ABI (affects data layout). So you can't use -f[no-]short-enums for executable tests. The best way to deal with this is to ensure that the size of the enum defaults to int (eg by adding a du

[Bug target/56513] Wrong code generation with -O3 on ARM

2024-11-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56513 --- Comment #8 from Richard Earnshaw --- For something this old, we should probably just close it as fixed as of Richi's patch.

[Bug target/114801] [14/15 Regression] arm: ICE in find_cached_value, at rtx-vector-builder.cc:100 with MVE intrinsics

2024-10-31 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114801 --- Comment #36 from Richard Earnshaw --- I've been looking at this. I think the real problem is that trunc_int_for mode is doing something incompatible with what the later code expects. We have /* Canonicalize BImode to 0 and STORE_FLAG_VA

[Bug target/116856] Generated Code with unaligned uint32_t potentially hardfaults on ARM (due to LDRD)

2024-09-27 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116856 --- Comment #8 from Richard Earnshaw --- BTW, rewriting the code as: #include typedef uint32_t __attribute__((aligned(1))) u32_u; void f() { static uint8_t array[64]; for (uint8_t i = 0; i < sizeof(array); i++) {

[Bug target/116856] Generated Code with unaligned uint32_t potentially hardfaults on ARM (due to LDRD)

2024-09-27 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116856 Richard Earnshaw changed: What|Removed |Added Resolution|--- |INVALID Status|WAITING

[Bug target/116856] Generated Code with unaligned uint32_t potentially hardfaults on ARM (due to LDRD)

2024-09-26 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116856 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |WAITING Ever confirmed|0

[Bug target/113780] [ARM] Incorrect indirect tailcall generated for PAC-enabled function.

2024-09-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113780 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |13.4

[Bug target/116597] [arm] indirect tailcalls with incomplete prototypes generate wrong code when using PACM

2024-09-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116597 Richard Earnshaw changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot gnu.org

[Bug target/116597] New: [arm] indirect tailcalls with incomplete prototypes generate wrong code when using PACM

2024-09-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116597 Bug ID: 116597 Summary: [arm] indirect tailcalls with incomplete prototypes generate wrong code when using PACM Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug target/116517] ICE in arm_print_operand_address

2024-08-28 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116517 --- Comment #3 from Richard Earnshaw --- The invalid insn is created during late-combine.

[Bug target/116517] ICE in arm_print_operand_address

2024-08-28 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116517 Richard Earnshaw changed: What|Removed |Added Last reconfirmed||2024-08-28 Status|UNCONF

[Bug target/116329] no sibcalling for thumb1 (cortex-m0)

2024-08-22 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116329 Richard Earnshaw changed: What|Removed |Added Resolution|--- |WONTFIX Status|UNCONFIRM

[Bug rtl-optimization/86901] [AArch64] Suboptimal register allocation for int/float reinterpret

2024-07-23 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86901 --- Comment #4 from Richard Earnshaw --- But why not: f2: fmovw1, s0 ubfxw1, w1, 20, 11 cmp w1, 1015 bhi .L7 fmuls0, s0, s0 str s0, [x0] ret .L7: b g

[Bug target/96373] [11 Regression] SVE miscompilation on vectorized division loop, leading to FP exception

2024-07-12 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96373 --- Comment #25 from Richard Earnshaw --- (In reply to Kewen Lin from comment #24) > OK, thanks for the comments, I'll mark PR108977 as won't fix then. It would be more normal to mark it as fixed, but set the fix version to the earliest release

[Bug target/115611] mve: vsetq_lane for 64-bits has wrong codegen when setting lane 1

2024-07-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115611 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |11.5

[Bug target/105090] BFI instructions are not generated on arm-none-eabi-g++

2024-07-10 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105090 --- Comment #9 from Richard Earnshaw --- It looks like the compiler now merges b into a rather than a into b. The result is the same, though and we don't need an lsr this way. Technically it ought to be better. But we do end up in a dance wit

[Bug target/103100] [11 Regression] unaligned access generated with memset or {} and -O2 -mstrict-align

2024-07-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103100 Richard Earnshaw changed: What|Removed |Added Target Milestone|11.5|12.5

[Bug c/115770] Undefined arm instruction (udf #255) is generated when optimizer is on O2

2024-07-03 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115770 --- Comment #2 from Richard Earnshaw --- Correction: the option to add is -fno-delete-null-pointer-checks Sorry for the confusion.

[Bug c/115770] Undefined arm instruction (udf #255) is generated when optimizer is on O2

2024-07-03 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115770 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/115732] Arm32 architecture definitions for v8+ appear to have wrong FPU/SIMD defaults

2024-07-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115732 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/115353] [14 regression] Missed thumb2 table branch instruction optimisations since r14-4946-g7006e5d2d7b5b2

2024-06-07 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115353 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |14.2

[Bug target/115360] cmse_nonsecure_call wrapper on arm missing STT_FUNCTION

2024-06-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115360 Richard Earnshaw changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug target/115353] [14/15 regression] Missed thumb2 table branch instruction optimisations since r14-4946-g7006e5d2d7b5b2

2024-06-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115353 Richard Earnshaw changed: What|Removed |Added Last reconfirmed||2024-06-05 Status|UNCONF

[Bug tree-optimization/115157] incorrect TBAA for derived types involving enum types

2024-06-03 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115157 --- Comment #4 from Richard Earnshaw --- The tests in the last patch fail on arm-eabi. The tests assume that sizeof(enum) == sizeof(int), which is not true if -fshort-enum is the default. + Chang

[Bug target/115086] bic is not used when the non-not part is a constant

2024-05-14 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115086 --- Comment #2 from Richard Earnshaw --- And perhaps more importantly the mov can even be hoisted outside of a loop.

[Bug target/115083] undefined reference for aarch64-w64-mingw32 target

2024-05-14 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115083 --- Comment #5 from Richard Earnshaw --- Please give the port developers time to finish working on the port. Only the initial patches have been pushed so far and there is plenty of work left to do.

[Bug target/115058] on target arm -mcpu=cortex-a78ae does not allow use pauth and dot product

2024-05-14 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115058 Richard Earnshaw changed: What|Removed |Added Resolution|--- |INVALID Status|WAITING

[Bug target/115058] on target arm -mcpu=cortex-a78ae does not allow use pauth and dot product

2024-05-13 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115058 Richard Earnshaw changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-16 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #34 from Richard Earnshaw --- To be honest, I'm more concerned that we aren't eliminating a lot of these copies during the gimple optimization phase. The memcpy is really a type punning step (that's strictly ISO C compliant, rather

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-15 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #31 from Richard Earnshaw --- While that does seem to fix the bug, it's at the cost of 6 additional stores in the problematic test that are redundant other than changing the alias set view.

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-12 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #29 from Richard Earnshaw --- Sorry, I was looking at the wrong pair of insns. The earlier store to that location was insn 111. 111: [r212:SI (1 MEM[(struct Vec128 *)_179]+0 S4 A64)] = {r0:SI..r3:SI} It appears that the problem is

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-12 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #27 from Richard Earnshaw --- (In reply to Richard Earnshaw from comment #26) > (In reply to Richard Biener from comment #25) > > I think it's more interesting why > > > > * 119: [r216:SI (2 MEM[(struct Vec128 *)_179]+0 S4 A64)] = >

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-12 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #26 from Richard Earnshaw --- (In reply to Richard Biener from comment #25) > I think it's more interesting why > > * 119: [r216:SI (2 MEM[(struct Vec128 *)_179]+0 S4 A64)] = > {r0:SI..r3:SI} > > isn't considered as dependence? Wh

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #23 from Richard Earnshaw --- #0 ptr_deref_may_alias_decl_p (ptr=0x75e0c678, decl=0x75dff000) at /home/rearnsha/gnusrc/gcc-cross/gcc-13/gcc/tree-ssa-alias.cc:295 #1 0x01768173 in indirect_ref_may_alias_decl_p (r

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #22 from Richard Earnshaw --- (Previous analysis is based on gcc-13 branch)

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 Richard Earnshaw changed: What|Removed |Added CC||rguenth at gcc dot gnu.org --- Comme

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-04-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #20 from Richard Earnshaw --- Created attachment 57928 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=57928&action=edit fully preprocessed testcase

[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

2024-03-22 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #19 from Richard Earnshaw --- This is another problem with (I suspect) incorrect aliasing information. If I compile with -fno-strict-aliasing, I get 88: f4432a1fvst1.8 {d18-d19}, [r3 :64] // {>E} SP+96/16 8c:

[Bug rtl-optimization/114338] (x & (-1 << y)) should be optimized to ((x >> y) << y) or vice versa

2024-03-14 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114338 --- Comment #1 from Richard Earnshaw --- Why would that be better? On a machine that does not lack registers, there's more instruction-level parallelism in (set (tmp) (-1)) (set (tmp) (ashift (tmp) (count))) (and (x) (x) (tmp)) What's more

[Bug target/114307] [ARM] GCC generates instruction that assembler rejects

2024-03-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114307 --- Comment #2 from Richard Earnshaw --- Note that it's clear from the .syntax markers that this is inline assembler that's the source of the invalid instructions.

[Bug target/114307] [ARM] GCC generates instruction that assembler rejects

2024-03-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114307 Richard Earnshaw changed: What|Removed |Added Last reconfirmed||2024-03-11 Status|UNCONF

[Bug testsuite/113428] [14 regression] gcc.dg/gomp/bad-array-section-c-3.c fails after r14-7158-gb5476e4c881b0d

2024-03-11 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113428 Richard Earnshaw changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug target/113542] [14 Regression] gcc.target/arm/bics_3.c regression after change for pr111267

2024-03-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113542 Richard Earnshaw changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug testsuite/113428] [14 regression] gcc.dg/gomp/bad-array-section-c-3.c fails after r14-7158-gb5476e4c881b0d

2024-03-06 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113428 --- Comment #6 from Richard Earnshaw --- Patch here: https://gcc.gnu.org/pipermail/gcc-patches/2024-March/647294.html

[Bug debug/100523] [11/12/13/14 Regression] armv8.1-m.main -fcompare-debug failure with -O -fmodulo-sched -mtune=cortex-a53

2024-03-06 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100523 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug libgcc/110775] [12/13/14 Regression] abort define causing issues in tsystem.h

2024-03-06 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110775 --- Comment #3 from Richard Earnshaw --- Perhaps we could use #define abort __builtin_trap ? A quick check seems to suggest this will work ok.

[Bug testsuite/113428] [14 regression] gcc.dg/gomp/bad-array-section-c-3.c fails after r14-7158-gb5476e4c881b0d

2024-03-06 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113428 --- Comment #4 from Richard Earnshaw --- /* { dg-warning {cast to pointer from integer of different size} "" { target *-*-* } .-2 } */ I'm guessing it's this that's causing the problem because int and int* are the same size on 32-bit targets.

[Bug testsuite/113428] [14 regression] gcc.dg/gomp/bad-array-section-c-3.c fails after r14-7158-gb5476e4c881b0d

2024-03-06 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113428 --- Comment #3 from Richard Earnshaw --- The referenced patch added the test that is failing. How is that a regression? Or are you suggesting that the test works without the rest of the patch applied?

[Bug target/113510] [14 Regression] [ARM Thumb] ICE in extract_constrain_insn with CPU cortex-m23

2024-03-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113510 Richard Earnshaw changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/113510] [14 Regression] [ARM Thumb] ICE in extract_constrain_insn with CPU cortex-m23

2024-03-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113510 Richard Earnshaw changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot gnu.org

[Bug testsuite/113611] [14 Regression] gcc.dg/pr110279-1.c fails on cross build since gcc-14-5779-g746344dd538

2024-03-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113611 Richard Earnshaw changed: What|Removed |Added Resolution|--- |INVALID Status|UNCONFIRM

[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

2024-03-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

2024-03-05 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |14.0

[Bug middle-end/114136] wrong code for c23 fully anonymous arg lists on arm

2024-03-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114136 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Target Milestone|---

[Bug target/114143] Non-thumb arm32 code in thumb multilib for libgcc and in -mthumb build

2024-02-29 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114143 --- Comment #5 from Richard Earnshaw --- (In reply to Richard Earnshaw from comment #4) > You're going to need --with-multilib=aprofile,rmprofile if you want the full > set of multilibs. But beware it builds a *lot* of them. Sorry, I mean --wi

[Bug target/114143] Non-thumb arm32 code in thumb multilib for libgcc and in -mthumb build

2024-02-29 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114143 --- Comment #4 from Richard Earnshaw --- You're going to need --with-multilib=aprofile,rmprofile if you want the full set of multilibs. But beware it builds a *lot* of them. We don't enable this by default because it conflicts with --with-arch

[Bug target/114143] Non-thumb arm32 code in thumb multilib for libgcc and in -mthumb build

2024-02-28 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114143 Richard Earnshaw changed: What|Removed |Added Last reconfirmed||2024-02-28 Status|UNCONF

[Bug middle-end/114136] wrong code for c23 fully anonymous arg lists on arm

2024-02-27 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114136 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug middle-end/114136] New: wrong code for c23 fully anonymous arg lists on arm

2024-02-27 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114136 Bug ID: 114136 Summary: wrong code for c23 fully anonymous arg lists on arm Product: gcc Version: 13.1.0 Status: UNCONFIRMED Keywords: wrong-code Severity: normal

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

2024-02-23 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120 Richard Earnshaw changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/108120] [11/12 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

2024-02-23 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120 Richard Earnshaw changed: What|Removed |Added Summary|[11/12/13 Regression] ICE: |[11/12 Regression] ICE: in

[Bug target/108120] [11/12/13 Regression] ICE: in extract_insn, at recog.cc:2791 (on ARM with -mfpu=neon -freciprocal-math -O3)

2024-02-23 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108120 Richard Earnshaw changed: What|Removed |Added Summary|[11/12/13/14 Regression]|[11/12/13 Regression] ICE:

[Bug target/107270] [11/12/13/14 Regression] return for structure is not as good as before

2024-02-22 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107270 Richard Earnshaw changed: What|Removed |Added Last reconfirmed||2024-02-22 Ever confirmed|0

[Bug target/113780] [ARM] Incorrect indirect tailcall generated for PAC-enabled function.

2024-02-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113780 Richard Earnshaw changed: What|Removed |Added CC||keithp at keithp dot com --- Comment

[Bug target/113795] armv8.1m-m.main+pacbti -mbranch-protection=standard -O2 compile error

2024-02-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113795 Richard Earnshaw changed: What|Removed |Added Resolution|--- |DUPLICATE Status|UNCONFI

[Bug target/108933] [11/12/13 Regression] Missing rev16 detection

2024-01-29 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108933 Richard Earnshaw changed: What|Removed |Added Summary|[11/12/13/14 Regression]|[11/12/13 Regression]

[Bug target/113542] [14 Regression] gcc.target/arm/bics_3.c regression after change for pr111267

2024-01-24 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113542 Richard Earnshaw changed: What|Removed |Added Keywords||missed-optimization --- Comment #2 f

[Bug target/113510] [14 Regression] [ARM Thumb] ICE in extract_constrain_insn with CPU cortex-m23

2024-01-24 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113510 --- Comment #6 from Richard Earnshaw --- (In reply to Andrew Pinski from comment #5) > Yes the peephole2 in thumb1.md looks wrong: > ``` > ;; Reloading and elimination of the frame pointer can > ;; sometimes cause this optimization to be missed.

[Bug rtl-optimization/113542] gcc.target/arm/bics_3.c regression after change for pr111267

2024-01-24 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113542 Richard Earnshaw changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug testsuite/113278] analyzer tests relying on fileno() fail on arm-eabi

2024-01-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113278 --- Comment #1 from Richard Earnshaw --- newlib certainly implements fileno(): $ nm libc.a|grep fileno libc_a-fileno.o: T fileno U fileno libc_a-fileno_u.o: T fileno_unlocked U fileno So perhaps the issue is

[Bug target/113257] -march=native or -mcpu=native are ineffective, but -march=native -mcpu=native works on arm64 M2 Ultra

2024-01-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113257 --- Comment #4 from Richard Earnshaw --- I'm not sure. My understanding was that -march=native started by looking up the CPU ID first and then using the internal mapping of that CPU to the architecture (which can't work if we don't recognize th

[Bug target/113257] -march=native or -mcpu=native are ineffective, but -march=native -mcpu=native works on arm64 M2 Ultra

2024-01-08 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113257 --- Comment #2 from Richard Earnshaw --- For -mcpu=native, the manual says: Additionally on native AArch64 GNU/Linux systems the value @samp{native} tunes performance to the host system. This option has no effect if the compiler is unable to r

[Bug middle-end/32667] block copy with exact overlap is expanded as memcpy

2024-01-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32667 --- Comment #61 from Richard Earnshaw --- Then I don't understand what you're trying to say in c57.

[Bug middle-end/32667] block copy with exact overlap is expanded as memcpy

2024-01-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32667 --- Comment #59 from Richard Earnshaw --- Memcpy must never write beyond the end of the specified buffer, even if reading it is safe. That wouldn't be thread safe.

[Bug middle-end/32667] block copy with exact overlap is expanded as memcpy

2024-01-04 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32667 --- Comment #56 from Richard Earnshaw --- I've never heard of a memcpy implementation that corrupts data if called with memcpy (p, p, n). (The problems come from partial overlaps where the direction of the copy may matter). Has anybody consider

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 --- Comment #28 from Richard Earnshaw --- (In reply to David Binderman from comment #5) > No idea. I know the gcc project is over 30 years old and it is not > feasible for me to download the entire history, it is too large. > > I have the last

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 --- Comment #27 from Richard Earnshaw --- > ==9933==by 0x151D554: search_line_fast (lex.cc:872) This is the entry code; so the issue is with the initial alignment code (unless the buffer is smaller than 16 bytes, when we might get both unde

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 --- Comment #26 from Richard Earnshaw --- I think it's more likely that this is at the start of the buffer rather than the end, and related to rounding the address down to a 16-byte alignment. But it could also occur at the end of the buffer as

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 --- Comment #24 from Richard Earnshaw --- (In reply to David Binderman from comment #22) > Is the optimization still worthwhile some 12 years later ? Almost certainly. Vector operations have become much better than they were at the time the pa

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 --- Comment #21 from Richard Earnshaw --- FTR it was this patch that added this code. So 2012! commit e75b54a2d932929a9b2e940c5aad1ef33a86c008 Author: Richard Earnshaw Date: Thu Mar 22 17:54:55 2012 + * lex.c (search_line_fast): Pr

[Bug target/113045] armv7l-unknown-linux-gnueabihf: valgrind error during build of libcc1

2024-01-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113045 Richard Earnshaw changed: What|Removed |Added CC||rearnsha at gcc dot gnu.org --- Comm

[Bug target/113030] parsecpu.awk's chkarch/chkcpu commands is broken for aliases

2023-12-15 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113030 --- Comment #4 from Richard Earnshaw --- Yes, that looks sensible. Can you post it please?

[Bug target/112334] ICE in gen_untyped_return arm.md:9197 while compiling harden-cfr-bret.c

2023-11-02 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112334 --- Comment #1 from Richard Earnshaw --- This might be a side issue, but: @defbuiltin{{void} __builtin_return (void *@var{result})} This built-in function returns the value described by @var{result} from the containing function. You should spe

[Bug target/109166] Built-in __atomic_test_and_set does not seem to be atomic on ARMv4T

2023-09-25 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109166 Richard Earnshaw changed: What|Removed |Added Resolution|--- |WONTFIX Status|NEW

[Bug target/111096] Frame pointer is not used even when -fomit-frame-pointer is specified

2023-08-24 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111096 --- Comment #8 from Richard Earnshaw --- (In reply to Thomas Koenig from comment #7) > Would it make sense to document this somewhere? Or did I just miss it? :-) Possibly, but I've no idea where. It's too target-specific to put under the gene

[Bug target/97807] ICE in output_move_double, at config/arm/arm.c:19689

2023-08-24 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97807 --- Comment #4 from Richard Earnshaw --- I can reproduce this, but only with -mfloat-abi=soft.

[Bug target/111096] Frame pointer is not used even when -fomit-frame-pointer is specified

2023-08-23 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111096 --- Comment #6 from Richard Earnshaw --- For completeness. The AArch64 ABI lists 4 alternatives with respect to having a frame chain. When -fomit-frame-pointer is used, GCC implements this one: - It may require the frame pointer to address a v

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