--- Comment #2 from dg dot recrutement31 at gmail dot com 2010-06-07 16:24
---
(From update of attachment 20856)
The program in which this bug occurs have been tested with valgrind that does
not reveal memory leak and other bug.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=7
--- Comment #1 from dg dot recrutement31 at gmail dot com 2010-06-07 16:20
---
Created an attachment (id=20856)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=20856&action=view)
source file in which a faulty control flow occurs.
Compiled with gcc 4.5 with the following
rity: P3
Component: rtl-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: dg dot recrutement31 at gmail dot com
GCC host triplet: Windows VISTA
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=7
--- Comment #9 from dg dot recrutement31 at gmail dot com 2010-05-27 12:21
---
(In reply to comment #7)
> You are wrong. It is user's responsibility to choose correct constraints for
> the inline assembly, the compiler doesn't try to understand what the inline
> a
--- Comment #8 from dg dot recrutement31 at gmail dot com 2010-05-27 12:05
---
(In reply to comment #7)
> You are wrong. It is user's responsibility to choose correct constraints for
> the inline assembly, the compiler doesn't try to understand what the inline
> a
--- Comment #6 from dg dot recrutement31 at gmail dot com 2010-05-27 11:18
---
(In reply to comment #4)
> All the tests demonstrate is that you have buggy constraint, in particular
> you shouldn't use "g" constraint on something you use in gs:[%2].
> "g&q
--- Comment #5 from dg dot recrutement31 at gmail dot com 2010-05-27 10:18
---
It is the -ftree-ter option that causes this incorrect behavior. And this
option, sole:
Other optimizations options (O1, O2 and O3) together don't generate wrong
assembly code.
--
http://gcc.gn
--- Comment #3 from dg dot recrutement31 at gmail dot com 2010-05-27 09:03
---
(In reply to comment #2)
> (In reply to comment #1)
> > I think your inline-asm is totally broken, the constraints you have don't
> > mean
> > the extended (32bit) registers
--- Comment #2 from dg dot recrutement31 at gmail dot com 2010-05-27 08:31
---
(In reply to comment #1)
> I think your inline-asm is totally broken, the constraints you have don't mean
> the extended (32bit) registers.
Humm... strange answer. Certainly, you've read
or: no such instruction: `movl %eax,8(%esp)'
main.s:33: Error: no such instruction: `movl $.LC0,4(%esp)'
main.s:34: Error: no such instruction: `movl $1,(%esp)'
main.s:36: Error: no such instruction: `movl $0,%eax'
--
Summary: [Extended inline asm] wrong assembly generation on IA32
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Severity: major
Priority: P3
Component: rtl-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: dg dot recrutement31 at gmail dot com
GCC host triplet: Windows Vista 32 bit and Linux 32 bit
GCC target triplet: i386
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44288
10 matches
Mail list logo
