[Bug target/70119] AArch64 should take advantage of implicit truncation of variable shift amount without defining SHIFT_COUNT_TRUNCATED

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119 --- Comment #6 from collison at gcc dot gnu.org --- Author: collison Date: Thu Jun 29 09:21:57 2017 New Revision: 249774 URL: https://gcc.gnu.org/viewcvs?rev=249774&root=gcc&view=rev Log: 2017-06-29 Kyrylo Tkachov Michael

[Bug target/68535] arm.c: 5 * set but not used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68535 --- Comment #3 from collison at gcc dot gnu.org --- Author: collison Date: Wed Jun 28 07:07:49 2017 New Revision: 249721 URL: https://gcc.gnu.org/viewcvs?rev=249721&root=gcc&view=rev Log: 2017-06-28 Michael Collison PR targ

[Bug target/70014] [ARM] Predicate does not match constraint (*subsi3_carryin_const)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70014 --- Comment #2 from collison at gcc dot gnu.org --- Author: collison Date: Thu Mar 3 07:42:02 2016 New Revision: 233927 URL: https://gcc.gnu.org/viewcvs?rev=233927&root=gcc&view=rev Log: 2016-03-03 Michael Collison PR targ

[Bug other/57195] Mode attributes with specific mode iterator can not be used as mode iterators in *.md files

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57195 --- Comment #7 from collison at gcc dot gnu.org --- Author: collison Date: Thu Sep 24 23:26:50 2015 New Revision: 228102 URL: https://gcc.gnu.org/viewcvs?rev=228102&root=gcc&view=rev Log: 2015-09-24 Michael Collison PR oth

[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64 - Improve Generic register_move_cost and memory_move_cost

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915 --- Comment #23 from collison at gcc dot gnu.org --- Author: collison Date: Tue Mar 10 07:34:20 2015 New Revision: 221302 URL: https://gcc.gnu.org/viewcvs?rev=221302&root=gcc&view=rev Log: 2015-03-10 Michael Collison Backport fr

[Bug target/63293] [AArch64] can read from deallocated stack

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63293 --- Comment #6 from collison at gcc dot gnu.org --- Author: collison Date: Tue Feb 10 08:17:09 2015 New Revision: 220574 URL: https://gcc.gnu.org/viewcvs?rev=220574&root=gcc&view=rev Log: 2015-02-10 Michael Collison Backport fr

[Bug rtl-optimization/63676] [5.0 regression] vshuf-v16hi.c ICE on arm-none-eabi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63676 --- Comment #3 from collison at gcc dot gnu.org --- Author: collison Date: Tue Feb 10 08:05:35 2015 New Revision: 220572 URL: https://gcc.gnu.org/viewcvs?rev=220572&root=gcc&view=rev Log: 2015-02-10 Michael Collison Backport fr

[Bug target/64460] ARM ICE on valid code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64460 --- Comment #13 from collison at gcc dot gnu.org --- Author: collison Date: Tue Feb 10 07:53:23 2015 New Revision: 220570 URL: https://gcc.gnu.org/viewcvs?rev=220570&root=gcc&view=rev Log: 2015-02-10 Michael Collison Backport fr

[Bug target/64011] Fail to compile pr48335-2.c on big-endian where bit insert instruction supported

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011 --- Comment #5 from collison at gcc dot gnu.org --- Author: collison Date: Tue Feb 10 07:31:25 2015 New Revision: 220568 URL: https://gcc.gnu.org/viewcvs?rev=220568&root=gcc&view=rev Log: 2015-02-10 Michael Collison Backport fr

[Bug tree-optimization/61114] Scalar evolution hides a big-endian const-folding bug.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61114 --- Comment #12 from collison at gcc dot gnu.org --- Author: collison Date: Tue Feb 10 02:23:40 2015 New Revision: 220562 URL: https://gcc.gnu.org/viewcvs?rev=220562&root=gcc&view=rev Log: 2015-02-09 Michael Collison Backport fr