Found it ...
I had
(define_expand "zero_extendhisi2"
[
(set (subreg:HI (match_operand:SI 0 "general_operand" "")0)
(match_operand:HI 1 "general_operand" ""))
(set (subreg:HI (match_dup 0)2)
(const_int 0))
]
""
""
)
which cr
I'm porting to a 16 bit micro and noticed that when optimization is
enabled (function.c:2101), most (non-volatile, non-addressed) stack
variables are copied into virtual registers. I assume this is so the
register allocator will attempt to allocate them to physical registers.
Unfortunately, in
On 15.04.2014 12:54, Jeff Law wrote:
On 04/14/14 18:58, pshor...@dataworx.com.au wrote:
I'm porting to a 16 bit micro and noticed that when optimization is
enabled (function.c:2101), most (non-volatile, non-addressed) stack
variables are copied into virtual registers. I assume this is so the
reg
For small micros such as MSP430 & friends and many of the Renasis
MCUs,
some of which only have 2K or ram on board, this could be a real
issue.
Although I reproduced the same behaviour on i386 using a stock
compiler,
I was wondering if there was something missing in my port that
prevents
spill
I've got a small test case there the ira pass produces this ...
(insn 35 38 36 5 (set (reg/v:SI 29 [orig:17 _b ] [17])
(reg/v:SI 17 [ _b ])) 48 {*ldsi}
(expr_list:REG_DEAD (reg/v:SI 17 [ _b ])
(nil)))
and the LRA processes it as follows ...
Spilling non-eliminable h
On 17.04.2014 13:00, Jeff Law wrote:
On 04/16/14 16:19, Richard Henderson wrote:
The register allocators only select an alternative for a move. They
do not
choose between N different patterns, separately describing loads,
stores, and
register-to-register movement.
I'm fairly sure the docum
