Re: Benchmark recommendations needed

2022-02-17 Thread andras
Thanks H-P! I'll certainly check it out. Andras February 17, 2022 9:15 AM, "Hans-Peter Nilsson" wrote: > On Mon, 14 Feb 2022, Andras Tantos wrote: > >> Hello all! >> >> I'm working on porting GCC to a new processor architecture. I think >>

Re: Benchmark recommendations needed

2022-02-23 Thread andras
22, 2022, at 4:26 PM, Gary Oblock via Gcc wrote: Andras, The whole point of benchmarks is to judge a processor's performance. That being said, just crippling GCC is not reasonable because processors must be judged in the appropriate context and that includes the current state of th

GCC 4.9.3 build on i386-apple-darwin9.8.0

2015-07-16 Thread Andras Salamon
Mac OS X 10.5 with XCode 3.1.4, bootstrapped via gcc-4.7.4. config.guess: 386-apple-darwin9.8.0 gcc -v: Using built-in specs. COLLECT_GCC=gcc COLLECT_LTO_WRAPPER=/usr/local/libexec/gcc/i386-apple-darwin9.8.0/4.9.3/lto-wrapper Target: i386-apple-darwin9.8.0 Configured with: ./configure --localsta

Why doesn't this pattern match?

2022-01-06 Thread Andras Tantos
Hello! My name is Andras Tantos and I just joined this list, so if I'm asking something off-topic or not following the rules of the community, please let me know. What I'm working on is to port GCC (and Binutils) to a new CPU ISA, I call 'brew'. During developing for th

Re: Why doesn't this pattern match?

2022-01-07 Thread Andras Tantos
Thanks for the help, that's exactly it! Andras On Thu, 2022-01-06 at 20:25 -0800, Andrew Pinski wrote: > On Thu, Jan 6, 2022 at 8:13 PM Andras Tantos > wrote: > > Hello! > > > > My name is Andras Tantos and I just joined this list, so if I'm > > asking

What's wrong with this RTL?

2022-01-09 Thread Andras Tantos
"O" "The constant zero" (and (match_code "const_int") (match_test "ival == 0") ) ) (define_insn "xorsi3" [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") (xor:SI (match_operand:SI 1 "register_operand" "r,r,r,r") (match_operand:SI 2 "nonmemory_operand" "1,O,r,i") ) )] "" "@ %0 <- %1 - %1 %0 <- %1 %0 <- %1 ^ %2 %0 <- %1 ^ (%2)" ) (define_insn "*movsi_move" [(set (match_operand:SI 0 "register_operand" "=r") (match_operand:SI 1 "register_operand" "r") )] "" "%0 <- %1" [(set_attr "length" "2")] ) (define_insn "*movsi_immed" [(set (match_operand:SI 0 "register_operand" "=r,r") (match_operand:SI 1 "immediate_operand" "O,i") )] "" "@ %0 <- %0 - %0 %0 <- %1" [(set_attr "length" "2,6")] ) This is quite possibly not enough information for anyone to figure this out, so please tell me what else should I include to make things more clear? Thanks a lot! Andras

Re: What's wrong with this RTL?

2022-01-10 Thread Andras Tantos
On Sun, 2022-01-09 at 22:19 -0800, Andrew Pinski wrote: > On Sun, Jan 9, 2022 at 8:49 PM Andras Tantos > wrote: > > All! > > > > I'm trying to port GCC to a new target, I call 'brew'. I've based > > it on > > the Moxie target mostly becaus

How to generate a call inst. sequence?

2022-01-18 Thread Andras Tantos
SI 4 $r4)) "call.c":9:1 -1   (nil))   } As a test to narrow the problem down, I removed the 'emit_jump_insn' call above. That generated an assembly (thus proving the theory that the assert has something to do with that), but then the assembly doesn't contain my label, only a reference to it; which of course later on would result in a linker error. So, what am I doing wrong and how can I achieve what I want? Thank you all wise sages! Andras

Re: How to generate a call inst. sequence?

2022-01-20 Thread Andras Tantos
On Wed, 2022-01-19 at 10:45 +, Richard Sandiford wrote: > Andras Tantos writes: > > All, > > > > I'm working on porting GCC to a processor architecture that doesn't > > have > > a (HW) stack nor a call instruction. This means that for calls

Benchmark recommendations needed

2022-02-15 Thread Andras Tantos
can you suggest some benchmarks or applications to be used as ones? Thanks a bunch! Andras

Re: Benchmark recommendations needed

2022-02-21 Thread Andras Tantos
That's true, I did notice GCC being rather ... peculiar about drhystone. Is there a way to make it less clever about the benchmark? Or is there some alteration to the benchmark I can make to not trigger the special behavior in GCC? Andras On Mon, 2022-02-21 at 03:19 +, Gary Oblock vi

Multiple types of load/store: how to create .md rules?

2022-05-02 Thread Andras Tantos
8 << $r0 $r10 <- short $a0 + 20 $r1 <- $r10 + $r0 mem[$fp + -32] <- $r1 ## < should be 'tiny' $r11 <- mem[$r1] To a previous problem I've asked, Andrew Pinski replied that I should merge all *movsi patterns into a single one to avoid (in that case) strange deletions in the generated assembly. Is that possible here? It appears to me that I would need the ability to differentiate the different patterns using constraints, but is there a way to define custom versions of the 'm' pattern? I didn't find anything on that in the documentation. Did I miss something? Thanks a bunch, Andras