I'm trying to detect loops of the form
while (*x != y)
++x;
which mimic the behaviour of function rawmemchr. Note, the size of *x is not
necessarily one byte. Thus ultimately I would like to detect such loops and
replace them with calls to builtins rawmemchr8, rawmemchr16, rawmemchr32 if
On Mon, Oct 26, 2020 at 01:46:52PM +0100, Richard Biener wrote:
> On Mon, Oct 26, 2020 at 10:59 AM Stefan Schulze Frielinghaus via Gcc
> wrote:
> >
> > I'm trying to detect loops of the form
> >
> > while (*x != y)
> > ++x;
> >
> > which
On Thu, Jul 28, 2022 at 08:53:37PM +0100, Jonathan Wakely via Gcc wrote:
> On Thu, 28 Jul 2022 at 20:49, Tim Lange wrote:
> >
> >
> >
> > On Thu, Jul 28 2022 at 02:46:58 PM -0400, David Malcolm via Gcc
> > wrote:
> > > Is there documentation on setting up text editors to work with our
> > > coding
On Mon, Aug 01, 2022 at 12:25:21PM +0100, Jonathan Wakely wrote:
> On Mon, 1 Aug 2022 at 09:24, Stefan Schulze Frielinghaus wrote:
> > I gave unexpand from GNU coreutils 8.32 a try. Looks like it cannot
> > deal with form feeds or maybe I'm missing something?
> >
> > $ bash -c "printf 'foo\n\f\n
Hi everyone,
Currently I'm looking into a wrong-code bug and would like to understand
a certain optimization done by combine during local transformation.
Without LTO I would simply debug cc1 and step through combine. However,
with LTO enabled AFAIK I have to debug lto1 instead. In order to get
t
On Thu, Nov 24, 2022 at 05:53:53PM +0100, Richard Biener wrote:
>
>
> > Am 24.11.2022 um 17:28 schrieb Stefan Schulze Frielinghaus via Gcc
> > :
> >
> > Hi everyone,
> >
> > Currently I'm looking into a wrong-code bug and would like to unders
Hi all,
while bisecting I recently ran into build errors like
In file included from /devel/gcc/libgcc/../gcc/tsystem.h:101,
from /devel/gcc/libgcc/libgcov.h:42,
from /devel/gcc/libgcc/libgcov-interface.c:26:
/usr/include/stdlib.h:931:6: error: wrong number of arg
Hi all,
Is there some sort of guarantee that the unused part of a partial vector has
all bits set to zero?
The question came up while implementing an insn for mode V2SF on s390
where only half of the hard register would be utilized. The final
machine instruction, however, would make use of the f
On Tue, Jun 04, 2024 at 09:50:04AM +0200, Richard Biener wrote:
> On Tue, Jun 4, 2024 at 8:52 AM Stefan Schulze Frielinghaus via Gcc
> wrote:
> >
> > Hi all,
> >
> > Is there some sort of guarantee that the unused part of a partial vector has
> > all bits set t
Hi all,
I'm trying to add an alternative to an existing insn foobar:
(define_insn "foobar"
[(set (match_operand ...)
(match_operand ...))]
""
"@
foo
bar
#")
Since the asm output depends on the operands in a non-trivial way which isn't
easily solved via iterators, I went fo
On Fri, Jun 21, 2024 at 09:50:43PM +0200, Georg-Johann Lay wrote:
>
>
> Am 17.06.24 um 21:13 schrieb Stefan Schulze Frielinghaus via Gcc:
> > Hi all,
> >
> > I'm trying to add an alternative to an existing insn foobar:
> >
> > (defi
On Sat, Jun 22, 2024 at 01:00:54PM +0200, Georg-Johann Lay wrote:
> Am 22.06.24 um 10:46 schrieb Stefan Schulze Frielinghaus:
> > On Fri, Jun 21, 2024 at 09:50:43PM +0200, Georg-Johann Lay wrote:
> > >
> > >
> > > Am 17.06.24 um 21:13 schrieb Stefan Schulze
I just ran into an unresolved iterator
https://gcc.gnu.org/pipermail/gcc-patches/2024-July/657360.html
which motivated me to dig into genoutput.cc where in process_template()
we already emit an error but only if the new compact syntax is used.
There is probably a reason for limiting the check to th
Hi all,
While trying to fix the failing test gcc.dg/torture/pr111821.c on s390 I'm
stumbling across another problem. After ira we have
(note 4 1 18 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 18 4 2 2 (set (reg:DI 66)
(reg:DI 2 %r2 [ p ])) "/gcc/testsuite/gcc.dg/torture/pr111821.c":5:1
1503 {
On Thu, Aug 08, 2024 at 06:03:13AM -0600, Jeff Law wrote:
>
>
> On 8/8/24 5:15 AM, Stefan Schulze Frielinghaus via Gcc wrote:
>
> >
> > However `(reg:DI 61 [ MEM[(const union T *)p_2(D)] ])` referencing the
> > same pseudo in a different mode is not substituted in
On Thu, Aug 08, 2024 at 07:57:43AM -0600, Jeff Law wrote:
>
>
> On 8/8/24 6:26 AM, Stefan Schulze Frielinghaus wrote:
> > On Thu, Aug 08, 2024 at 06:03:13AM -0600, Jeff Law wrote:
> > >
> > >
> > > On 8/8/24 5:15 AM, Stefan Schulze Frielinghaus via
On Thu, Aug 08, 2024 at 01:56:48PM -0600, Jeff Law wrote:
> > I haven't tested it extensively but it triggers at least for the current
> > case.
> > I would have loved to also print the insn but couldn't figure out how to ICE
> > and stringify an insn. I will have a look at this tomorrow. Did yo
On Fri, Aug 09, 2024 at 09:49:03AM +0200, Stefan Schulze Frielinghaus wrote:
> On Thu, Aug 08, 2024 at 01:56:48PM -0600, Jeff Law wrote:
> > > I haven't tested it extensively but it triggers at least for the current
> > > case.
> > > I would have loved to also print the insn but couldn't figure ou
Hi all,
For older s390 machines, which do not support vector extensions, I'm trying to
implement 2-byte GPR<->FPR moves. Since GPRs are right-aligned and FPRs
left-aligned I cannot trivially copy between them. However, at least since
z9-ec (TARGET_DFP) we have instructions ldgr/lgdr in order to
Hi everyone,
In order to better test our s390 builtins, I have been coming up with a
small tool in order to automatically generate tests. The tool consumes
s390-builtins.def and generates currently
$ ls -1 | wc -l
4703
many files which consume
$ du -s -h .
19M .
space in total. Since the
On Mon, Jan 13, 2025 at 07:18:05AM -0700, Jeff Law via Gcc wrote:
>
>
> On 1/13/25 2:56 AM, Stefan Schulze Frielinghaus via Gcc wrote:
> > Hi everyone,
> >
> > In order to better test our s390 builtins, I have been coming up with a
> > small tool in order to a
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