Hi,
Although I have been porting and using gcc for quite a while now, I am
still a newbie at the internals and would be grateful if you can help me.
I have designed a CPU architecture where most of the instructions only
accept data operands as registers and no immediate values are allowed,
w
Hi Rask,
Basically the CPU has the 'SCALE_28_4' instruction which does the following:
output = (operand1 >> 28) | (operand2 << 4)
From my understanding the OR operation (ior), doesn't get canonicalized
since it's second operand (in this case (lshiftrt:SI (match_operand:SI 2
"register_operand"
Hi Andrew,
You mean using a DI rotate left by 4 and then saving the output as SI
(saving the hi part and ignoring the low one) ?
Also, how is canonicalization detected anyway? Are there rules that gcc
follows? How can they be changed?
Sami
Andrew Pinski wrote:
output = (operand1 >> 28)
OK, I see what you mean. The reason you can get both (ior (ashift ...)
(lshiftrt ...)) and (ior (lshiftrt ...) (ashift ...)) is that simplify-rtx.c
has no rule to canonicalize such expressions and that LSHIFTRT and
ASHIFT have the same precedence.
Hmm, in simplify_binary_operation_1(), it s
(match_operand:SI 2 "nonmemory_operand" "r")])
(label_ref (match_operand 3 "" ""))
(pc)))]
""
"c%C0jump %1 %2 %3"
[(set_attr "type" "branch")
(set_attr "length" "1")]
)
Regards,
Sami Khawam
The University of Edinburgh
http://www.see.ed.ac.uk/~sxk
o a
single instruction during the optimization steps.
Would it be possible to tell this to emit_conditional_move so that it generates
the cmove insn directely?
Many Thanks,
Sami Khawam
Gary Funck wrote:
This works fine on gcc 3.4, however on gcc 4.0 it creates an error during
optimization. Acco
