implement assembly variant routines for IEEE floating-point under libgcc

Hi All, For cortex-m0 (armv6-m) target, i observed that ieee floating-point functions under libgcc are implemented in C. This takes lot of memory if one uses floating-point in their applcations. I agree that usage of fp in cortex-m0 devices might be minimal. I wanted to check if its good idea to

[resend] implement assembly variant routines for IEEE floating-point under libgcc for cortex-m0

Hi All, sorry, sending previous mail with proper subject line. For cortex-m0 (armv6-m) target, i observed that ieee floating-point functions under libgcc are implemented in C. This takes lot of memory if one uses floating-point in their applciations. I agree that usage of fp in cortex-m0 devices

fp emulation libraries in assembly for armv6-m architecture

Hi, I notice that, libgcc has fp emulation libraries written in C for armv6-m architecture which is quite big in size. Also I see that other architecture like armv7-m has these libraries written in assembly for smaller size lib. I wanted to know, is there anybody working on this feature supporting