About VLIW backend

Hi, I wonder if any efforts have been made to retarget GCC to VLIW backend.Is there any project trying to do that? Is it included in the GCC mainstream? Thanks. Regards, Li Wang

Re: About VLIW backend

Hi, I know that. But I am talking to a more _pure_ VLIW architecture which totally relies on static scheduling rather than EPIC architecture. Thanks. Li Wang wrote: Hi, I wonder if any efforts have been made to retarget GCC to VLIW backend.Is there any project trying to do that? Is it

Re: How to describe function units allocation

by just modifying cc1. Not involve the assembler gas. If possible to achieve that by only coding the .md, .h and .c files? Regards, Li Wang Hi, For the backend TI DSP TMS320C6x, There are four types of functional units which are .L unit, .M unit, .S unit and .D unit, and each type consists of

Re: How to let GCC produce flat assembly

e it. If I want to let GCC produce assembly for it, how should I code the machine description file? Should I first let cc1 produce a elf assembly for it, and then let binutils trunate it to a flat assembly? It seems ugly hacking. Thanks. Regards, Li Wang > Li Wang wrote: > >> Hi,

How to let GCC produce flat assembly

Hi, I wonder how to let GCC produce flat assembly, say, just like the .com file under the DOS, without function calls and complicate executable file headers, only instructions. How to modify the machine description file to achieve that? Thanks in advance. Regards, Li Wang

Re: How to let GCC produce flat assembly

sible to let cc1 produce such assembly? Thanks. movl$2, -4(%ebp) movl$2, -8(%ebp) movl-8(%ebp), %eax addl -4(%ebp), %eax Regards, Li Wang On Thu, Nov 15, 2007 at 04:20:49PM -0800, Li Wang wrote: I may need explain this problem more clearly. Yes, my earlier mes

Re: How to let GCC produce flat assembly

Dave Korn 写道: On 16 November 2007 05:56, Li Wang wrote: As you said, the coprocessor has no ABI to describe a stack and a function interface, then inline applies. But how could I inline 'main'? And I am sorry for I misuse the word 'elf assembly', what exactly I mean by

Generate Codes for a something like stack/dataflow computer

Hi, We are retargetting GCC to a VLIW chip, which runs as a coprocessor to a general purpose processor. The coprocessor is responsible for expediating some code sections which have good parallel characteristics without any dependences. Its ISA enables it can only fetch data sequentially rather than