On 2020/8/3 12:24 AM, Thomas Koenig via Gcc wrote:
Hi,
in a patch I am developing, I have the following code:
typedef struct {
gfc_code *c;
int branch_level;
bool seen_goto;
vec extrema;
} do_t;
static vec doloop_list;
[...]
do_t loop;
doloop_list.safe_push (loop);
do
Hi Jakub,
We've been going over how we should implement the requires directive, in a bit
more complete
sense than the current state (i.e. only atomic_default_mem_order working).
For the three clauses where the specification requires that "must appear in all
compilation
units of a program that c
On 2011/10/27 04:33 PM, Revital Eres wrote:
> Hello,
>
> I'm working on estimating register pressure in SMS and using
> ira_available_class_regs for getting the number of available
> registers.
> However I encounter a case where ira_available_class_regs showed 64
> available regs for a certain cla
On 2010/12/31 09:38 PM, Richard Sandiford wrote:
> Mingjie Xing writes:
>> There are two test cases failed when run 'make check-gcc
>> RUNTESTFLAGS="mips.exp"'. The log is,
>>
>> Executing on host: /home/xmj/tools/build-test-trunk-mips/gcc/xgcc
>> -B/home/xmj/tools/build-test-trunk-mips/gcc/
>> /
On 13/6/24 下午11:43, Tom de Vries wrote:
> Richard,
>
> I've noticed that f.i. *thumb2_alusi3_short has no explicit setting of the
> conds
> attribute, which means the value of the conds attribute for this insn is
> nocond:
> ...
> (define_insn "*thumb2_alusi3_short"
> [(set (match_operand:SI
emore and myself (Chung-Lin Tang), both of Mentor Graphics, as
target maintainers.
Thank you,
Chung-Lin
[1] http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00526.html
http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00527.html
http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00528.html
On 2013/12/28 09:31 AM, Yangfei (Felix) wrote:
> Hi,
>
> I think that simple_return standard pattern is useful for the ARM. I mean
> it should be good for target code performance.
> But seems this pattern is not there for the GCC ARM backend. Can anyone
> explain the reason why we don’t need
On 2023/10/10 11:11 PM, Andrew Stubbs wrote:
> Hi all,
>
> I'm trying to add a new register set to the GCN port, but I've hit a
> problem I don't understand.
>
> There are 256 new registers (each 2048 bit vector register) but the
> register file has to be divided between all the running hard
