Confused about code/comment in tree.c:build2

Hi, In tree.c:build2 there is following code/comment: if ((code == MINUS_EXPR || code == PLUS_EXPR || code == MULT_EXPR) && arg0 && arg1 && tt && POINTER_TYPE_P (tt) /* When sizetype precision doesn't match that of pointers we need to be able to build explicit extensions or

How should I check if a type can be contextually converted to another one in c++FE

Hi, As subject, how should I check if a type can be contextually converted to bool, in c++FE? Thanks, bin

Re: Live on Exit renaming.

On Mon, Jul 6, 2015 at 6:02 AM, Steven Bosscher wrote: > On Sat, Jul 4, 2015 at 3:45 PM, Ajit Kumar Agarwal wrote: >> I am not sure why the above optimization is not implemented in GCC. > > -fsplit-ivs-in-unroller And thing might have changed. Given the condition GCC does IVO on gimple, unrollin

Re: Live on Exit renaming.

On Mon, Jul 6, 2015 at 12:02 PM, Ajit Kumar Agarwal wrote: > > > -Original Message- > From: Bin.Cheng [mailto:amker.ch...@gmail.com] > Sent: Monday, July 06, 2015 7:04 AM > To: Steven Bosscher > Cc: Ajit Kumar Agarwal; l...@redhat.com; Richard Biener; gcc@gcc.gnu.

Re: Live on Exit renaming.

On Mon, Jul 6, 2015 at 1:16 PM, Ajit Kumar Agarwal wrote: > > > -Original Message- > From: Bin.Cheng [mailto:amker.ch...@gmail.com] > Sent: Monday, July 06, 2015 10:26 AM > To: Ajit Kumar Agarwal > Cc: Steven Bosscher; l...@redhat.com; Richard Biener; gcc@gcc.gnu.

Re: Does GCC generate LDRD/STRD (Register) forms?

On Tue, Jul 7, 2015 at 10:05 AM, Anmol Paralkar (anmparal) wrote: > Hello, > > Does GCC generate LDRD/STRD (Register) forms [A8.8.74/A8.8.211 per ARMv7-A > & ARMv7-R ARM]? > > Based on various attempts to write code to get GCC to generate a sample > form, and subsequently inspecting the code I see

Question about always executed info computed in tree-ssa-loop-im.c

Hi, Function fill_always_executed_in_1 computes basic blocks' always executed information, and it has below code and comment: /* In a loop that is always entered we may proceed anyway. But record that we entered it and stop once we leave it. */ inn_loop = bb->loop_fat

Re: Question about always executed info computed in tree-ssa-loop-im.c

On Wed, Jul 8, 2015 at 5:51 PM, Richard Biener wrote: > On Wed, Jul 8, 2015 at 8:52 AM, Bin.Cheng wrote: >> Hi, >> Function fill_always_executed_in_1 computes basic blocks' always >> executed information, and it has below code and comment: >> >>

Re: Question about always executed info computed in tree-ssa-loop-im.c

On Wed, Jul 8, 2015 at 5:58 PM, Bin.Cheng wrote: > On Wed, Jul 8, 2015 at 5:51 PM, Richard Biener > wrote: >> On Wed, Jul 8, 2015 at 8:52 AM, Bin.Cheng wrote: >>> Hi, >>> Function fill_always_executed_in_1 computes basic blocks' always >>> executed in

Re: %fs and %gs segments on x86/x86-64

On Thu, Jul 9, 2015 at 8:02 PM, Armin Rigo wrote: > Hi all, > > Here is an updated patch (attached) for __seg_fs and __seg_gs: > > * added a target hook "default_pointer_address_modes" to avoid > disabling a few gcc optimizations which, according to my reading of > the documentation, should contin

Re: Bin Cheng as Loop Induction Variable Optimizations maintainer

On Sat, Aug 1, 2015 at 5:03 AM, Jeff Law wrote: > I am pleased to announce that the GCC Steering Committee has appointed Bin > Cheng as the IVopts maintainer. > > Please join me in congratulating Bin on his new role. > > Bin, please update your entry in the MAINTAINERS file. I also believe you Do

Re: Awareness of register pressure on strength reduction of induction variables.

On Wed, Sep 2, 2015 at 8:52 PM, Richard Biener wrote: > On Tue, Sep 1, 2015 at 7:57 PM, Ajit Kumar Agarwal > wrote: >> All; >> >> The Global code motion are the important optimization that have an impact on >> register spills and Fetch. Thus >> The Global code motion takes into account the incre

How to generate jump_table_data in rtl optimizers

Hi, I used below code snippet to generate jump_table_data: //setup label refs start_sequence (); emit_jump_table_data(gen_rtx_ ADDR_DIFF_VEC (CASE_VECTOR_MODE, base_label_ref, label_refs...)) insns = get_insns (); end_sequence (); split_edge_and_insert (edge, insns); But

Re: How to generate jump_table_data in rtl optimizers

On Mon, Nov 9, 2015 at 2:20 PM, Bin.Cheng wrote: > Hi, > I used below code snippet to generate jump_table_data: > > //setup label refs > start_sequence (); > emit_jump_table_data(gen_rtx_ > ADDR_DIFF_VEC (CASE_VECTOR_MODE, > > base_label_ref, > >

Re: Question about PR 48814 and ivopts and post-increment

On Wed, Dec 2, 2015 at 5:11 AM, Steve Ellcey wrote: > > I have a question involving ivopts and PR 48814, which was a fix for > the post increment operation. Prior to the fix for PR 48814, MIPS > would generate this loop for strcmp (C code from glibc): > > $L4: > lbu $3,0($4) >

Re: Question about PR 48814 and ivopts and post-increment

On Fri, Dec 4, 2015 at 10:48 AM, Bin.Cheng wrote: > On Wed, Dec 2, 2015 at 5:11 AM, Steve Ellcey wrote: >> >> I have a question involving ivopts and PR 48814, which was a fix for >> the post increment operation. Prior to the fix for PR 48814, MIPS >> would generate t

Re: Question about PR 48814 and ivopts and post-increment

On Fri, Dec 4, 2015 at 11:00 AM, Bin.Cheng wrote: > On Fri, Dec 4, 2015 at 10:48 AM, Bin.Cheng wrote: >> On Wed, Dec 2, 2015 at 5:11 AM, Steve Ellcey wrote: >>> >>> I have a question involving ivopts and PR 48814, which was a fix for >>> the post increment

Re: Test case mis-categorized as UNSUPPORTED?

On Thu, Jan 7, 2016 at 2:21 PM, Kyrill Tkachov wrote: > Hi Bin, > > > On 07/01/16 14:15, Bin.Cheng wrote: >> >> Hi, >> Below test is supposed to be compiled and run, but we failed to link >> the binary with tiny memory model. >> >> spawn >

Question about how to fix PR69052

Hi, In revision 229402, I added logic in loop-invariant.c to check if a look invariant can be forward propagated to memory references in the same loop; and increase loop invariant cost if the answer is no. I think this is a reasonable change. Some targets like AArch64 can benefit from it because

Re: Question about how to fix PR69052

On Mon, Jan 25, 2016 at 7:51 PM, Jeff Law wrote: > On 01/25/2016 11:42 AM, Bin.Cheng wrote: >> >> >> Yuri Rumyantsev suggested we may add a hook to handle GOT related >> instruction propagation specially so it won't be hoisted out. Is a >> hook at this s

Re: Question about how to fix PR69052

On Mon, Jan 25, 2016 at 8:05 PM, Bernd Schmidt wrote: > On 01/25/2016 08:51 PM, Jeff Law wrote: >> >> No, the combiner works within a basic block only. There was a group, I >> believe in Moscow, that worked on a cross-block combiner. It was >> discussed at the Cauldron in California a few years

Re: Question about how to fix PR69052

On Tue, Jan 26, 2016 at 12:56 PM, Bernd Schmidt wrote: > On 01/26/2016 10:48 AM, Bin.Cheng wrote: >> >> Yes, I moved whole loop pass (also the pass_web) after combine and it >> worked. A combine pass before loop-invariant can fix this problem. >> Below passes are curre

Re: Question about how to fix PR69052

On Tue, Jan 26, 2016 at 1:51 PM, Bin.Cheng wrote: > On Tue, Jan 26, 2016 at 12:56 PM, Bernd Schmidt > wrote: >> On 01/26/2016 10:48 AM, Bin.Cheng wrote: >>> >>> Yes, I moved whole loop pass (also the pass_web) after combine and it >>> worked. A combine

Re: Question about how to fix PR69052

On Tue, Jan 26, 2016 at 4:26 PM, Jeff Law wrote: > On 01/26/2016 02:28 AM, Bin.Cheng wrote: >> >> Yes, loop invariant now increased invariant cost if the invariant >> can't be propagated into address expression. Problem is we check >> propagation by simply

libstdc++ and c library compatible issue when bootstrap GCC

Hi, I ran into below error message at stage2 of bootstrap GCC: /work/obj/gcc-bootstrap/./prev-gcc/xg++ -B/work/obj/gcc-bootstrap/./prev-gcc/ -B//aarch64-none-linux-gnu/bin/ -nostdinc++ -B/work/obj/gcc-bootstrap/prev-aarch64-none-linux-gnu/libstdc++-v3/src/.libs -B/work/obj/gcc-bootstrap/prev-aarc

Help about how to bootstrap gcc with local version glibc other than system one

Hi, Recently I tried to bootstrap gcc against new glibc but failed. What I want to do is just bootstrap gcc against local version glibc other than system one, because I can't update glibc in that system. I tried this by configuring GCC using "--with-build-sysroot" or "--with-sysroot" or both, but

Re: Help about how to bootstrap gcc with local version glibc other than system one

On Mon, Feb 1, 2016 at 6:08 PM, Andreas Schwab wrote: > "Bin.Cheng" writes: > >> Seems to me Andrew was right in comment of PR69559, that we simply >> couldn't bootstrap GCC with sysroot. > > The main use of sysroot is to build a cross compiler, which

Re: Help about how to bootstrap gcc with local version glibc other than system one

On Mon, Feb 1, 2016 at 7:45 PM, Jeff Law wrote: > On 02/01/2016 12:07 PM, Bin.Cheng wrote: >> >> On Mon, Feb 1, 2016 at 6:08 PM, Andreas Schwab >> wrote: >>> >>> "Bin.Cheng" writes: >>> >>>> Seems to me Andrew was right

Inconsistent initialization for pic_offset_table_rtx?

Hi, I noticed that pic_offset_table_rtx is initialized twice in GCC. Take x86_32 as an example. The first initialization is done in emit_init_regs, with below code: pic_offset_table_rtx = NULL_RTX; if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) pic_offset_table_rtx = gen_raw_RE

Re: Inconsistent initialization for pic_offset_table_rtx?

On Thu, Feb 4, 2016 at 3:18 PM, Ilya Enkovich wrote: > 2016-02-04 17:12 GMT+03:00 Bin.Cheng : >> Hi, >> I noticed that pic_offset_table_rtx is initialized twice in GCC. Take >> x86_32 as an example. >> The first initialization is done in emit

Re: Inconsistent initialization for pic_offset_table_rtx?

On Fri, Feb 5, 2016 at 10:32 AM, Ilya Enkovich wrote: > 2016-02-04 19:16 GMT+03:00 Bin.Cheng : >> On Thu, Feb 4, 2016 at 3:18 PM, Ilya Enkovich wrote: >>> 2016-02-04 17:12 GMT+03:00 Bin.Cheng : >>>> Hi, >>>> I noticed that pic_offset_table_rtx is initial

Re: Inconsistent initialization for pic_offset_table_rtx?

On Tue, Feb 9, 2016 at 2:56 PM, Ilya Enkovich wrote: > 2016-02-09 17:27 GMT+03:00 Bin.Cheng : >> On Fri, Feb 5, 2016 at 10:32 AM, Ilya Enkovich >> wrote: >>> 2016-02-04 19:16 GMT+03:00 Bin.Cheng : >>>> On Thu, Feb 4, 2016 at 3:18 PM, Ilya Enkovich >>

Re: Inconsistent initialization for pic_offset_table_rtx?

On Tue, Feb 9, 2016 at 3:53 PM, Ilya Enkovich wrote: > 2016-02-09 18:45 GMT+03:00 Richard Earnshaw (lists) > : >> On 09/02/16 14:56, Ilya Enkovich wrote: >>> >>> I agree it looks inconsistent. But I don't think PIC_OFFSET_TABLE_REGNUM is >>> supposed to return pseudo regno. Using EBX_REG value

Re: ipa vrp implementation in gcc

On Mon, Jan 18, 2016 at 5:10 PM, Jan Hubicka wrote: >> On Mon, Jan 18, 2016 at 12:00 AM, Kugan >> wrote: >> > Hi, >> > >> >> Another potential use of value ranges is the profile estimation. >> >> http://www.lighterra.com/papers/valuerangeprop/Patterson1995-ValueRangeProp.pdf >> >> It seems to me

Re: Help about how to bootstrap gcc with local version glibc other than system one

On Mon, Feb 1, 2016 at 7:45 PM, Jeff Law wrote: > On 02/01/2016 12:07 PM, Bin.Cheng wrote: >> >> On Mon, Feb 1, 2016 at 6:08 PM, Andreas Schwab >> wrote: >>> >>> "Bin.Cheng" writes: >>> >>>> Seems to me Andrew was right

Unnecessary check on phi node in tree if-conversion?

Hi, Function if_convertible_phi_p has below check on virtual PHI nodes: if (any_mask_load_store) return true; /* When there were no if-convertible stores, check that there are no memory writes in the branches of the loop to be if-converted. */ if (virtual_operand_p (gimple_p

Re: Unnecessary check on phi node in tree if-conversion?

On Wed, Apr 6, 2016 at 5:07 PM, Bin.Cheng wrote: > Hi, > Function if_convertible_phi_p has below check on virtual PHI nodes: > > > if (any_mask_load_store) > return true; > > /* When there were no if-convertible stores, check > that there are no memory wr

Re: Unnecessary check on phi node in tree if-conversion?

On Thu, Apr 7, 2016 at 10:30 AM, Richard Biener wrote: > On April 6, 2016 8:21:35 PM GMT+02:00, "Bin.Cheng" > wrote: >>On Wed, Apr 6, 2016 at 5:07 PM, Bin.Cheng >>wrote: >>> Hi, >>> Function if_convertible_phi_p has below check on virtual PH

Question about fold C_MAYBE_CONST_EXPR expressions

Hi, I ran into a problem that C frontend (in function build_conditional_expr) creates expression like (C_MAYBE_CONST_EXPR (NULL, x + const)). The inner expression (and its operands) have unsigned int type. After that, the expression needs to be casted to result type which is unsigned short. In t

Re: Question about fold C_MAYBE_CONST_EXPR expressions

On Sun, Jul 24, 2016 at 11:04 PM, Prathamesh Kulkarni wrote: > On 24 July 2016 at 21:26, Bin.Cheng wrote: >> Hi, >> I ran into a problem that C frontend (in function >> build_conditional_expr) creates expression like (C_MAYBE_CONST_EXPR >> (NULL, x + const)). Th

Questions about pedantic_non_lvalue_loc and related code

Hi, I am trying to move simplifications in fold_cond_expr_with_comparison to match.pd and had below questions about pedantic_non_lvalue_loc. Last change for the function is: commit 565353e8cf24046c034ecaf04dcb69ea8319a57c Author: rguenth Date: Tue Nov 11 15:21:12 2014 + 2014-11-11 Ri

Re: Why is this not optimized?

On Wed, May 14, 2014 at 9:14 PM, Bingfeng Mei wrote: > Hi, > I am looking at some code of our target, which is not optimized as expected. > For the following RTX, I expect source of insn 17 should be propagated into > insn 20, and insn 17 is eliminated as a result. On our target, it will become

[RFC]Better support for big-endian targets in GCC vectorizer

Hi, To attract more eyes, I should have used a scarier subject like "GCC's vectorizer is heading in the wrong direction on big-endian targets". The idea came from a simple vectorization case I ran into and a discussion with Richard. Given simple case like: typedef signed short *__restrict__ pRS

Help understand the may_be_zero field in loop niter information

Hi, I noticed there is below code/comments about may_be_zero field in loop niter desc: tree may_be_zero;/* The boolean expression. If it evaluates to true, the loop will exit in the first iteration (i.e. its latch will not be executed), even if the niter

Re: Help understand the may_be_zero field in loop niter information

On Thu, Jun 12, 2014 at 7:59 PM, Zdenek Dvorak wrote: > Hi, > >> > I noticed there is below code/comments about may_be_zero field in loop >> > niter desc: >> > >> > tree may_be_zero;/* The boolean expression. If it evaluates to true, >> >the loop will exit in the first itera

Re: [PATCH] gcc/dwarf2asm.c: Add static_output_delta() with var_list for dw2_asm_output_delta()

On Sat, Jun 14, 2014 at 5:50 PM, Chen Gang wrote: > On 06/14/2014 05:45 PM, Chen Gang wrote: >> dw2_asm_output_vms_delta() calls dw2_asm_output_delta() in an abnormal >> way, so need add a new function just like vprintf() for printf(), and >> then the related call will be in normal way. >> >> The

Re: Help understand the may_be_zero field in loop niter information

On Thu, Jun 12, 2014 at 7:59 PM, Zdenek Dvorak wrote: > Hi, > >> > I noticed there is below code/comments about may_be_zero field in loop >> > niter desc: >> > >> > tree may_be_zero;/* The boolean expression. If it evaluates to true, >> >the loop will exit in the first itera

Re: regs_used estimation in IVOPTS seriously flawed

On Tue, Jun 17, 2014 at 10:59 PM, Bingfeng Mei wrote: > Hi, > I am looking at a performance regression in our code. A big loop produces > and uses a lot of temporary variables inside the loop body. The problem > appears that IVOPTS pass creates even more induction variables (from original > 2 to 2

Re: regs_used estimation in IVOPTS seriously flawed

On Fri, Jun 20, 2014 at 5:01 PM, Bingfeng Mei wrote: > > >> -Original Message----- >> From: Bin.Cheng [mailto:amker.ch...@gmail.com] >> Sent: 20 June 2014 06:25 >> To: Bingfeng Mei >> Cc: gcc@gcc.gnu.org >> Subject: Re: regs_used estimation in IV

Re: Comparison of GCC-4.9 and LLVM-3.4 performance on SPECInt2000 for x86-64 and ARM

On Wed, Jun 25, 2014 at 5:26 PM, Bingfeng Mei wrote: > Thanks for nice benchmarks. Vladimir. > > Why is GCC code size so much bigger than LLVM? Does -Ofast have more unrolling On the contrary, I don't think rtl unrolling is enabled by default on GCC with level O3/Ofast. There is no unroll dump fil

Re: Comparison of GCC-4.9 and LLVM-3.4 performance on SPECInt2000 for x86-64 and ARM

On Wed, Jun 25, 2014 at 5:47 PM, Bin.Cheng wrote: > On Wed, Jun 25, 2014 at 5:26 PM, Bingfeng Mei wrote: >> Thanks for nice benchmarks. Vladimir. >> >> Why is GCC code size so much bigger than LLVM? Does -Ofast have more >> unrolling > On the contrary, I don'

Question about GCC's standard dependent optimization

Hi, I ran into PR60947, in which GCC understands the return value of memset is the first argument passed in, according to standard, then does optimization like below: movip, sp stmfdsp!, {r4, r5, r6, r7, r8, r9, r10, fp, ip, lr, pc} subfp, ip, #4 subsp, sp, #20 l

Re: Question about GCC's standard dependent optimization

Thanks for elaborating. On Thu, Jun 26, 2014 at 5:18 PM, Richard Biener wrote: > On Thu, Jun 26, 2014 at 10:44 AM, Bin.Cheng wrote: >> Hi, >> I ran into PR60947, in which GCC understands the return value of >> memset is the first argument passed in, according to s

Re: Question about GCC's standard dependent optimization

On Fri, Jun 27, 2014 at 4:13 AM, Jeff Law wrote: > On 06/26/14 02:44, Bin.Cheng wrote: >> >> Hi, >> I ran into PR60947, in which GCC understands the return value of >> memset is the first argument passed in, according to standard, then >> does optimization

Re: Question about GCC's standard dependent optimization

On Mon, Jun 30, 2014 at 5:42 PM, Jeff Law wrote: > On 06/26/14 14:13, Jeff Law wrote: >> >> On 06/26/14 02:44, Bin.Cheng wrote: >>> >>> Hi, >>> I ran into PR60947, in which GCC understands the return value of >>> memset is the first argum

Why is unsigned type introduced in a simple case?

Hi, For a simple example like below. int f1 (int p, short i, short n) { int sum = 0; do { sum += i; i++; } while (i < n); return sum; } When compiling with -O2 -fdump-tree-all options, GCC introduces unsigned type at the very beginning of gimple pass, for example, th

Re: [AArch64] Using QEMU to run Ubuntu ARM 64-bit

On Tue, Aug 26, 2014 at 9:56 PM, Sebastian Pop wrote: > Hi, > > my colleague Brian has posted the instructions to set up > an AArch64 virtual machine running ubuntu on top of qemu: > > http://rzycki.blogspot.com/2014/08/using-qemu-to-run-ubuntu-arm-64-bit.html > > We are using this setup to bootst

Re: Some questions about pass web

On Wed, Sep 3, 2014 at 7:35 AM, Carrot Wei wrote: > Hi > > I have following questions about web (pseudo register renaming) pass: > > 1. It is well known that register renaming is a big help to register > allocation, but in gcc's backend, the web pass is far before RA, there > are about 20 passes b

Re: GCC ARM: aligned access

On Mon, Sep 1, 2014 at 9:14 AM, Peng Fan wrote: > > > On 09/01/2014 08:09 AM, Matt Thomas wrote: >> >> On Aug 31, 2014, at 11:32 AM, Joel Sherrill >> wrote: >> Hi, I am writing some code and found that system crashed. I found it was unaligned access which causes `data abort`

Question on param MAX_PENDING_LIST_LENGTH in sched-deps

Hi, The parameter MAX_PENDING_LIST_LENGTH is set to 32 by default. It seems to me the length of pending list can't be larger than 32. But in sched-deps.c, below code is used: /* Pending lists can't get larger with a readonly context. */ if (!deps->readonly && ((deps->pendin

Re: Question on param MAX_PENDING_LIST_LENGTH in sched-deps

On Fri, Nov 7, 2014 at 7:10 AM, Jeff Law wrote: > On 11/04/14 20:29, Bin.Cheng wrote: >> >> Hi, >> The parameter MAX_PENDING_LIST_LENGTH is set to 32 by default. It >> seems to me the length of pending list can't be larger than 32. But >&g

Do we create new insn in combine? Or can we rely on INSN_LUID checking the order of instuctions?

Hi, I am looking into distribute_notes, one reason why it's complicated is the live range of register noted by REG_DEAD could be both shrunk or extended. When live range shrinks, we need to search backwards to find previous reference and mark it as REG_DEAD (or delete the definition if there is no

Re: Fixing inconsistent uses of address costs

On Thu, Mar 26, 2015 at 11:40 PM, Kyrill Tkachov wrote: > Hi all, > > I'd like to attempt to make GCC's usage of costs in the backends consistent. > We have a lot of different types: rtx costs, address costs, regmove costs, > vector costs etc. Some of them are use in different units, compared agai

Re: Fixing inconsistent uses of address costs

On Fri, Mar 27, 2015 at 5:43 PM, Kyrill Tkachov wrote: > > On 27/03/15 03:29, Bin.Cheng wrote: >> >> On Thu, Mar 26, 2015 at 11:40 PM, Kyrill Tkachov >> wrote: >>> >>> Hi all, >>> >>> I'd like to attempt to make GCC's usage o

Re: Fixing inconsistent uses of address costs

On Sat, Mar 28, 2015 at 1:31 AM, Sandra Loosemore wrote: > On 03/27/2015 03:43 AM, Kyrill Tkachov wrote: >> >> >> On 27/03/15 03:29, Bin.Cheng wrote: >>> >>> [much snippage] >>> >>> >>> As for tree ivopts, address cost is used

Combine changes ASHIFT into mult for non-MEM rtx

Hi, In function make_compound_operation, the code/comment says: case ASHIFT: /* Convert shifts by constants into multiplications if inside an address. */ if (in_code == MEM && CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT && INTVAL (XE

Re: Combine changes ASHIFT into mult for non-MEM rtx

On Thu, Apr 2, 2015 at 5:49 PM, Kugan wrote: > On 02/04/15 20:39, Bin.Cheng wrote: >> Hi, >> In function make_compound_operation, the code/comment says: >> >> case ASHIFT: >> /* Convert shifts by constants into multiplications if inside >>

Re: Combine changes ASHIFT into mult for non-MEM rtx

On Thu, Apr 2, 2015 at 8:32 PM, Jeff Law wrote: > On 04/02/2015 03:39 AM, Bin.Cheng wrote: >> >> Hi, >> In function make_compound_operation, the code/comment says: >> >> case ASHIFT: >>/* Convert shifts by constants into multiplications if insid

Question about macro _GLIBCXX_RES_LIMITS in libstdc++ testsuite

Hi, In libstdc++ testsuite, I noticed that macro _GLIBCXX_RES_LIMITS is checked/set by GLIBCXX_CHECK_SETRLIMIT, which is further guarded by GLIBCXX_IS_NATIVE as below: AC_DEFUN([GLIBCXX_CONFIGURE_TESTSUITE], [ if $GLIBCXX_IS_NATIVE ; then # Do checks for resource limit functions. GLIBCXX

Re: Question about macro _GLIBCXX_RES_LIMITS in libstdc++ testsuite

On Sat, May 16, 2015 at 5:35 PM, Hans-Peter Nilsson wrote: > On Thu, 23 Apr 2015, Bin.Cheng wrote: >> Hi, >> In libstdc++ testsuite, I noticed that macro _GLIBCXX_RES_LIMITS is >> checked/set by GLIBCXX_CHECK_SETRLIMIT, which is further guarded by >> GLIBCXX_IS_NATI

Re: Question about macro _GLIBCXX_RES_LIMITS in libstdc++ testsuite

On Mon, May 18, 2015 at 9:40 AM, Jim Wilson wrote: > On 05/17/2015 01:16 AM, Bin.Cheng wrote: >> On Sat, May 16, 2015 at 5:35 PM, Hans-Peter Nilsson >> wrote: >>> On Thu, 23 Apr 2015, Bin.Cheng wrote: >>>> Hi, >>>> In libstdc++ testsuite, I notice

Re: Identifying Chain of Recurrence

On Fri, May 29, 2015 at 12:41 PM, Pritam Gharat wrote: > GCC builds a chain of recurrence to capture a pattern in which an > array is accessed in a loop. Is there any function which identifies > that gcc has built a chain of recurrence? Is this information > associated to the gimple assignment whi

Re: Identifying Chain of Recurrence

_info() non-static and recompiling the source > code? > > Thanks, > Pritam Gharat > > On Fri, May 29, 2015 at 10:34 AM, Bin.Cheng wrote: >> On Fri, May 29, 2015 at 12:41 PM, Pritam Gharat >> wrote: >>> GCC builds a chain of recurrence to capture a pat

progress on PR85804?

Hi, Is there any progress on PR85804? There were some discussion about the old path at below address, but looks like no further attentions. https://gcc.gnu.org/ml/gcc-patches/2018-05/msg01026.html Thanks, bin

A GCC bug related to inline?

Hi, Given below simple code: inline int foo (int a) { return a + 1; } int g = 5; int main(void) { return foo(g); } When compiled with -O0, GCC generates below assembly: .file "test.c" .text .globl g .data .align 4 .type g, @object .size g, 4 g: .long 5 .text .globl main .type main, @function

Re: Parallelize the compilation using Threads

On Wed, Dec 12, 2018 at 11:46 PM Giuliano Augusto Faulin Belinassi wrote: > > Hi, I have some news. :-) > > I replicated the Martin Liška experiment [1] on a 64-cores machine for > gcc [2] and Linux kernel [3] (Linux kernel was fully parallelized), > and I am excited to dive into this problem. As

Is it a bug allowing to copy GIMPLE_ASM with labels?

Hi, Give below test: volatile int a, b, c; __attribute__((noinline)) int foo () { int i; for (i = 0; i < 1000; i++) { if (i % 17) a++; else b++; asm volatile( "foo_label:\n" "pushq %%rbx\n" "popq %%rbx\n" :"=m"(c) :"r"(i)

Re: Is it a bug allowing to copy GIMPLE_ASM with labels?

On Sat, Dec 29, 2018 at 3:42 PM Alexander Monakov wrote: > > On Sat, 29 Dec 2018, Bin.Cheng wrote: > > tracer-1.c: Assembler messages: > > tracer-1.c:16: Error: symbol `foo_label' is already defined > > > > Root cause is in tracer.c which duplicates basi

question about inlining long call sequence

Hi, When reading inlining code in GCC, I wonder if we have size heuristics to limit inlining long call sequence? For example, for call sequence A -> B -> C -> D -> ... -> X -> Y -> Z if each function call grows size by a very small amount, inlining Z all the way up to the outermost function could

Re: question about inlining long call sequence

On Tue, Feb 12, 2019 at 6:16 PM Martin Jambor wrote: > > On Tue, Feb 12 2019, Bin.Cheng wrote: > > Hi, > > When reading inlining code in GCC, I wonder if we have size heuristics > > to limit inlining long call sequence? For example, for call sequence > > A ->

Re: GCC missing -flto optimizations? SPEC lbm benchmark

On Fri, Feb 15, 2019 at 3:30 AM Steve Ellcey wrote: > > I have a question about SPEC CPU 2017 and what GCC can and cannot do > with -flto. As part of some SPEC analysis I am doing I found that with > -Ofast, ICC and GCC were not that far apart (especially spec int rate, > spec fp rate was a sligh

Re: Rust front-end

On Fri, Aug 23, 2019 at 10:11 PM Mateus Carmo Martins de Freitas Barbosa wrote: > > I'm interested in working on the Rust front-end for GCC. > > So far I've cloned the repository > and tried to compile it as described in >

Any future plan supporting livepatching in kernel for AArch64?

Hi, I read through previous messages which tried to support livepatching in kernel for AArch64. Following is the patch supporting mfentry: https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00756.html And this is the last message about above thread: https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01093.ht

Re: Any future plan supporting livepatching in kernel for AArch64?

On Thu, Sep 19, 2019 at 1:02 PM Andrew Pinski wrote: > > On Wed, Sep 18, 2019 at 9:56 PM Andrew Pinski wrote: > > > > On Wed, Sep 18, 2019 at 9:24 PM Bin.Cheng wrote: > > > > > > Hi, > > > I read through previous messages which tried to sup

Re: Do we need to do a loop invariant motion after loop interchange ?

On Fri, Nov 22, 2019 at 3:19 PM Richard Biener wrote: > > On November 22, 2019 6:51:38 AM GMT+01:00, Li Jia He > wrote: > > > > > >On 2019/11/21 8:10 PM, Richard Biener wrote: > >> On Thu, Nov 21, 2019 at 10:22 AM Li Jia He > >wrote: > >>> > >>> Hi, > >>> > >>> I found for the follow code: > >>

Re: Do we need to do a loop invariant motion after loop interchange ?

On Fri, Nov 22, 2019 at 3:23 PM Bin.Cheng wrote: > > On Fri, Nov 22, 2019 at 3:19 PM Richard Biener > wrote: > > > > On November 22, 2019 6:51:38 AM GMT+01:00, Li Jia He > > wrote: > > > > > > > > >On 2019/11/21 8:10 PM, Richard Biener wr

Re: Do we need to do a loop invariant motion after loop interchange ?

On Mon, Nov 25, 2019 at 5:29 PM Li Jia He wrote: > > > > On 2019/11/24 2:26 PM, Bin.Cheng wrote: > > On Fri, Nov 22, 2019 at 3:23 PM Bin.Cheng wrote: > >> > >> On Fri, Nov 22, 2019 at 3:19 PM Richard Biener > >> wrote: > >>> &

Re: Vectorization regression on s390x GCC6 vs GCC5

On Thu, Jan 26, 2017 at 10:18 AM, Robin Dapp wrote: > Hi, > > while analyzing a test case with a lot of nested loops (>7) and double > floating point operations I noticed a performance regression of GCC 6/7 > vs GCC 5 on s390x. It seems due to GCC 6 vectorizing something GCC 5 > couldn't. > Basic

Re: Duplicating loops and virtual phis

On Mon, May 15, 2017 at 7:32 PM, Richard Biener wrote: > On May 15, 2017 6:56:53 PM GMT+02:00, Steve Ellcey wrote: >>On Sat, 2017-05-13 at 08:18 +0200, Richard Biener wrote: >>> On May 12, 2017 10:42:34 PM GMT+02:00, Steve Ellcey >> om> wrote: >>> > >>> > (Short version of this email, is there a

Question about comment in vect_prune_runtime_alias_test_list

Hi, In that function, we have below comments: /* Basically, for each pair of dependent data refs store_ptr_0 and load_ptr_0, we create an expression: ((store_ptr_0 + store_segment_length_0) <= load_ptr_0) || (load_ptr_0 + load_segment_length_0) <= store_ptr_0)) for aliasing

Re: Duplicating loops and virtual phis

On Mon, May 22, 2017 at 1:42 AM, Kugan Vivekanandarajah wrote: > Hi Bin and Steve, > > On 17 May 2017 at 19:41, Bin.Cheng wrote: >> On Mon, May 15, 2017 at 7:32 PM, Richard Biener >> wrote: >>> On May 15, 2017 6:56:53 PM GMT+02:00, Steve Ellcey >>> wrote

Lack of capability to represent arbitrary alias dependent information

HI, GCC adds runtime alias checks for data references in passes like vectorizer, it would be very useful to pass along the runtime alias dependent information to later passes. Given below expample: int foo (int *a, int *b, int *c, int *d, int *e, int len, int v) { int k, x; for (k = 0; k < le

Re: Lack of capability to represent arbitrary alias dependent information

On Mon, Jun 12, 2017 at 10:15 AM, Richard Biener wrote: > On Mon, Jun 12, 2017 at 11:02 AM, Bin.Cheng wrote: >> HI, >> GCC adds runtime alias checks for data references in passes like >> vectorizer, it would be very useful to pass along the runtime alias >> dependent

Re: Lack of capability to represent arbitrary alias dependent information

On Mon, Jun 12, 2017 at 11:46 AM, Bin.Cheng wrote: > On Mon, Jun 12, 2017 at 10:15 AM, Richard Biener > wrote: >> On Mon, Jun 12, 2017 at 11:02 AM, Bin.Cheng wrote: >>> HI, >>> GCC adds runtime alias checks for data references in passes like >>> vectorizer

Re: Optimization for static local variables

On Wed, Jun 14, 2017 at 12:14 PM, Prachi Godbole wrote: > I'm developing a solution to optimize away intermediate stores (loads) for > static local variables which are assigned to before referenced on every path > through a function. > > Currently GCC eliminates all loads/stores in a straight li

Re: How to migrate POINTER_TYPE_OVERFLOW_UNDEFINED for GCC v8.x?

On Fri, Aug 4, 2017 at 8:00 AM, Leslie Zhai wrote: > Hi GCC developers, > > As ChangeLog mentioned: > > 2017-08-01 Bin Cheng > > * tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete. > > > Then how to migrate it for GCC v8.x? for example: > > Constant *Result = POINTER_TYPE_OVERFLOW_UNDEFINED

Re: Overwhelmed by GCC frustration

On Thu, Aug 17, 2017 at 6:22 PM, wrote: > >> On Aug 17, 2017, at 11:22 AM, Oleg Endo wrote: >> >> On Wed, 2017-08-16 at 19:04 -0500, Segher Boessenkool wrote: >>> >>> LRA is easier to work with than old reload, and that makes it better >>> maintainable. >>> >>> Making LRA handle everything reloa

Re: RFC: Improving GCC8 default option settings

On Thu, Sep 14, 2017 at 11:24 AM, Richard Biener wrote: > On Thu, Sep 14, 2017 at 12:18 PM, Martin Liška wrote: >> On 09/14/2017 12:07 PM, Markus Trippelsdorf wrote: >>> On 2017.09.14 at 11:57 +0200, Richard Biener wrote: On Wed, Sep 13, 2017 at 6:11 PM, Nikos Chantziaras wrote: >

Re: Handling prefetcher tag collisions while allocating registers

On Tue, Oct 24, 2017 at 12:44 AM, Kugan Vivekanandarajah wrote: > Hi All, > > I am wondering if there is anyway we can prefer certain registers in > register allocations. That is, I want to have some way of recording > register allocation decisions (for loads in loop that are accessed in > steps)

Question about generated type for common block in fortran

Hi, I am looking into DSE transformation of some fortran codes. Given below fortran declarations: real*8 a(len) , b(len) , c(len) , d(len) common /area/ a, b, c, d real*8 src1(len), temp1(len), temp2(len), src2(len) equivalence(src1, a), (src2, b), (temp

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