[ARM] Cortex-M3 multiply costs

AFAIK, Cortex-M3 has single-cycle multiply, right? I'm seeing gcc 4.5.2 prefering to do a lot (up to 5) of adds w/ shifts in places where a single mult would suffice. If I'm interpreting it right, where are the costs computed? Thanks! Alexandre

Re: arm-elf multilib issues

On Thu, Oct 1, 2009 at 20:22, Paul Brook wrote: > > > > Almost certainly not. As far as I'm concerned arm-elf is obsolete, and in > > > maintenance only mode. You should be using arm-eabi. Is it now possible to build a 100% arm-eabi functional toolchain (including i.e. newlib) in multilib mode st

Re: What to do with hardware exception (unaligned access) ? ARM920T processor

2008/10/1 Vladimir Sterjantov <[EMAIL PROTECTED]>: > Hi! > > Processor ARM920T, chip Atmel at91rm9200. > > Simple C code: > > char c[30]; > unsigned short *pN = &c[1]; > > *pN = 0x1234; > > causes hardware exeption - memory aborts (used to implement memory > protection or virtual memory). > > We ha

[ARM] Implement __builtin_bswap32() via ARMv6 "rev" instruction

A patch follows. I didn't take care of the scheduling case the correct way, tought (aliased to clz class). Can someone please review (works for me (c)) and merge? -- Alexandre --- gcc-4.3.2/gcc/config/arm/arm.md~2008-12-05 18:17:09.0 -0200 +++ gcc-4.3.2/gcc/config/arm/arm.md 2008-

Re: [ARM] Implement __builtin_bswap32() via ARMv6 "rev" instruction

> 2008/12/8 Paul Brook <[EMAIL PROTECTED]>: > On Monday 08 December 2008, Alexandre Pereira Nunes wrote: >> A patch follows. I didn't take care of the scheduling case the correct >> way, tought (aliased to clz class). > > Please read http://gcc.gnu.org/contribut

Re: [ARM] Implement __builtin_bswap32() via ARMv6 "rev" instruction

2008/12/8 Ian Lance Taylor <[EMAIL PROTECTED]>: > "Alexandre Pereira Nunes" <[EMAIL PROTECTED]> writes: > >> I can provide these, tough as for the copyright assignment, the >> document mentions I can declare the changes in public domain, and >> sin

Re: arm-elf-ld: undefined reference to 'xxx'

> [cut] ... > But if I exchange the place of obj1.o with obj2.o, then the command is > successful without any error. > > I want to solve without exchanging objs. (Bcs, I have too many objs.) > If arm-elf-ld has an option related to this problem, it will be possible. > > Is there the way to solve it

Re: ARM compiler generating never-used constant data structures

On Wed, Feb 4, 2009 at 11:05 PM, Zoltán Kócsi wrote: [cut] > > If I compile the above with -O2 or -Os, then if the target is AVR or > x86_64 then the result is what I expected, func() just loads 3 or 12345 > then returns and that's all. There is no .rodata generated. > > However, compiling for th

Re: Reserving a number of consecutive registers

On Mon, Apr 20, 2009 at 1:33 PM, fearyourself wrote: > > For the moment, we will be remaining in the 4.3.2 version and have no > plans to follow the next 4.4/4.5 versions. > > Does any architecture do such a "machine-specific reorg" pass. I've > looked around and haven't really seen one. Could you

Re: GCC 4.3.0 Status Report (2008-02-14)

Also regarding ARM, PR31849 (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31849 ) is a show stopper, at least for some embedded bare metal targets, i.e. arm-elf and arm-none-eabi. Until size optimization at least matches gcc 4.2, gcc 4.3 will

Possible ABI issue: PR33823

Could someone please take a look at PR33823? It may or may not involve an ABI change issue.

Re: GCC 4.3.0 Status Report (2008-02-14)

Richard Guenther escreveu: On Thu, Feb 14, 2008 at 7:28 PM, Alexandre Pereira Nunes <[EMAIL PROTECTED]> wrote: Also regarding ARM, PR31849 (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31849 <http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31849>) is a show stopper, at least for s

Can't reproduce PR34800/PR28706 with gcc 4.3 (arm-elf, i486-linux-gnu), close it?

Hi, I no longer can reproduce PR34800, can someone else verify and close it? Also, PR28706 seems fixed for both 4.3 and 4.2.2/4.2.3.

[RFC] Implement __builtin_bswap* for ARMv6

Hi, It seems to me that as of ARMv6, the arm family supports the REV* instructions, in order to endian swap 32 and 16 bit values. Would it be complicated to implement e.g. __builtin_bswap32 on armv6 with inline semantics (I mean, without generating a library call)? Thanks, Alexandre

Re: [RFC] Implement __builtin_bswap* for ARMv6

Paul Brook escreveu: Would it be complicated to implement e.g. __builtin_bswap32 on armv6 with inline semantics (I mean, without generating a library call)? Probably not. Paul Also, it would be interesting to have an inline version for architectures older than armv6, when optimizin

Re: Optimizing for size

This could be related to PR31849. If so, this is well-known before the 4.3.0 release, and altought IIRC it affects other architetures as well (powerpc and m68k at least), apparently no one proposed a solution yet. Please see: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31849 Thanks, Alexandre

Fwd: QUERY : ARM inline code in Thumb file?

2008/8/27 Aaron P. D'Souza <[EMAIL PROTECTED]> > > hello: > > one small question regarding use of ARM inline assembly code in a > C file that has been compiled for Thumb mode. > > is it possible to use ARM assembly code from within a C file that > has been compiled for Thumb and Thumb interworking?