ASSERT_EXPR during SIMPLE_IPA_PASS and LTO

2022-03-01 Thread Erick Ochoa via Gcc
Hi, I am working on an analysis that is able to determine some static information about a specific variable. At the moment, I would like to avoid much of the transformation by taking advantage of other GCC's passes. So, I can imagine something like, create an ASSERT_EXPR and let other passes chang

ARM Cortex-R5F Support

2022-03-01 Thread Kinsey Moore
Hi, I'm looking at working on Cortex-R5F support for RTEMS, but it seems as if latest GCC supports the Cortex-R5. This R5 has implicit FPU support which would make it really R5F. The ARM reference page on this core (https://developer.arm.com/Processors/Cortex-R5) specifies that the FPU is opt

Re: ASSERT_EXPR during SIMPLE_IPA_PASS and LTO

2022-03-01 Thread Richard Biener via Gcc
On Tue, Mar 1, 2022 at 3:37 PM Erick Ochoa via Gcc wrote: > > Hi, > > I am working on an analysis that is able to determine some static > information about a specific variable. At the moment, I would like to avoid > much of the transformation by taking advantage of other GCC's passes. So, I > can