Re: Adjust offset of array reference in named address space

2021-01-12 Thread Tucker Kern via Gcc
> So you are saying that a 16bit data word in IMEM is actually two 12bit > data words (supposedly only the lower 8 bits used in each) and thus the > array contains "padding"? Effectively yes. The assembler handles dividing constants into their LSB and MSB components. I have insn patterns and split

Re: Adjust offset of array reference in named address space

2021-01-12 Thread Richard Biener via Gcc
On Tue, Jan 12, 2021 at 4:29 PM Tucker Kern wrote: > > > So you are saying that a 16bit data word in IMEM is actually two 12bit > > data words (supposedly only the lower 8 bits used in each) and thus the > > array contains "padding"? > > Effectively yes. The assembler handles dividing constants in

Refund tokin

2021-01-12 Thread rizwanbashir99--- via Gcc
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