* Martin Jambor:
> as you might know, Tejas is our Google Summer of Code student working on
> adding built-in functions for some new math functions added in ISO/IEC
> TS 18661.
>
> His next step is to expand "functions rounding result to narrower type"
> (so fadd, fsub and possibly fmul and fdiv d
On Fri, 26 Jul 2019 18:39:50 +0100
Richard Sandiford wrote:
> [Catching up after being away, sorry if this has already been resolved.]
>
> Jozef Lawrynowicz writes:
> > For MSP430, the folding of identical functions marked with the "interrupt"
> > attribute by -fipa-icf-functions results in wro
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On Mon, 29 Jul 2019, Segher Boessenkool wrote:
> I think this is refering to the "fadds" and similar Power architecture
> instructions, which take as inputs any single or double precision
> numbers, and round the result to single precision? These instructions
Yes.
On Power9, it is *also* possib
On Tue, 30 Jul 2019, Florian Weimer wrote:
> * Martin Jambor:
>
> > as you might know, Tejas is our Google Summer of Code student working on
> > adding built-in functions for some new math functions added in ISO/IEC
> > TS 18661.
> >
> > His next step is to expand "functions rounding result to na
Hello.
> fold_const_fadd), for example I am not sure what the return values are
> supposed to mean, and add a run-time testcase(s) and I'd say you are
> done for now
I modeled real_fadd function on a similar function, real_nextafter
which would take three arguments. Just as overflow and underflow
Hi,
> In GCC (in rs6000.md) we have the "*add3_fpr" and similar insns,
> which could be extended to allow DF inputs with an SF output; it doesn't
> yet allow it.
Thanks for the inputs, I will try to address these points now. I have
built GCC on gcc112 and will apply patch and test testcases there
