LTO bootstrap failure for GCC-5 prerelease.

2015-04-17 Thread Toon Moene
See: https://gcc.gnu.org/ml/gcc-testresults/2015-04/msg01975.html Comparing stages 2 and 3 warning: gcc/cc1-checksum.o differs warning: gcc/cc1obj-checksum.o differs warning: gcc/cc1plus-checksum.o differs Bootstrap comparison failure! gcc/tree-ssa-uninit.o differs gcc/tree-switch-conversion.o d

Re: LTO bootstrap failure for GCC-5 prerelease.

2015-04-17 Thread Richard Biener
On Fri, Apr 17, 2015 at 10:16 AM, Toon Moene wrote: > See: > > https://gcc.gnu.org/ml/gcc-testresults/2015-04/msg01975.html > > Comparing stages 2 and 3 > warning: gcc/cc1-checksum.o differs > warning: gcc/cc1obj-checksum.o differs > warning: gcc/cc1plus-checksum.o differs > Bootstrap comparison f

ira.c update_equiv_regs patch causes gcc/testsuite/gcc.target/arm/pr43920-2.c regression

2015-04-17 Thread Shiva Chen
Hi, I think the rtl dump in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64916 is not jump2 phase rtl dump. Because jump2 is after ira, the register number should be hardware register number. the jump2 rtl dump should as follow ... 31: NOTE_INSN_BASIC_BLOCK 5 32: [r6:SI]=r4:SI REG_D

Re: PR63633: May middle-end come up width hard regs for insn expanders?

2015-04-17 Thread Georg-Johann Lay
I allowed me to CC Vladimir; maybe he can propose how the backend can describe an efficient, constraint-based solution. The problem is about expanders producing insns with non-fixed hard-regs as in/out operands or clobbers. This includes move insn from non-generic address spaces which require

Re: LTO bootstrap failure for GCC-5 prerelease.

2015-04-17 Thread Toon Moene
On 04/17/2015 10:49 AM, Richard Biener wrote: On Fri, Apr 17, 2015 at 10:16 AM, Toon Moene wrote: See: https://gcc.gnu.org/ml/gcc-testresults/2015-04/msg01975.html Comparing stages 2 and 3 warning: gcc/cc1-checksum.o differs warning: gcc/cc1obj-checksum.o differs warning: gcc/cc1plus-checksu

IRA preferencing issues

2015-04-17 Thread Wilco Dijkstra
Hi, While investigating why the IRA preferencing algorithm often chooses incorrect preferences from the costs, I noticed this thread: https://gcc.gnu.org/ml/gcc/2011-05/msg00186.html I am seeing the exact same issue on AArch64 - during the final preference selection ira-costs takes the union of

Questions about C as used/implemented in practice

2015-04-17 Thread Peter Sewell
Dear gcc list, we are trying to clarify what behaviour of C implementations is actually relied upon in modern practice, and what behaviour is guaranteed by current mainstream implementations (these are quite different from the ISO standards, and may differ in different contexts). Focussing on the

RE: IRA preferencing issues

2015-04-17 Thread Matthew Fortune
Wilco Dijkstra writes: > While investigating why the IRA preferencing algorithm often chooses > incorrect preferences from the costs, I noticed this thread: > https://gcc.gnu.org/ml/gcc/2011-05/msg00186.html > > I am seeing the exact same issue on AArch64 - during the final > preference selection

Re: Questions about C as used/implemented in practice

2015-04-17 Thread Paul_Koning
> On Apr 17, 2015, at 9:14 AM, Peter Sewell wrote: > > Dear gcc list, > > we are trying to clarify what behaviour of C implementations is > actually relied upon in modern practice, and what behaviour is > guaranteed by current mainstream implementations (these are quite > different from the ISO

Re: Questions about C as used/implemented in practice

2015-04-17 Thread Peter Sewell
On 17 April 2015 at 15:19, wrote: > >> On Apr 17, 2015, at 9:14 AM, Peter Sewell wrote: >> >> Dear gcc list, >> >> we are trying to clarify what behaviour of C implementations is >> actually relied upon in modern practice, and what behaviour is >> guaranteed by current mainstream implementations

Re: [gcc libcc1] build_qualified_type for self-referencing/incomplete types

2015-04-17 Thread Jan Kratochvil
On Tue, 14 Apr 2015 08:09:05 +0200, Jan Kratochvil wrote: > On Fri, 10 Apr 2015 14:31:45 +0200, Jan Kratochvil wrote: > > What is the recommended fix? I expect pointer to a declaration / opaque > > type > > which gets completed only when one references the 'p' field later? > > It looks as it got

RE: IRA preferencing issues

2015-04-17 Thread Wilco Dijkstra
> Matthew Fortune wrote: > Wilco Dijkstra writes: > > While investigating why the IRA preferencing algorithm often chooses > > incorrect preferences from the costs, I noticed this thread: > > https://gcc.gnu.org/ml/gcc/2011-05/msg00186.html > > > > I am seeing the exact same issue on AArch64 - dur

Re: Questions about C as used/implemented in practice

2015-04-17 Thread msebor
On 04/17/2015 09:01 AM, Peter Sewell wrote: On 17 April 2015 at 15:19, wrote: On Apr 17, 2015, at 9:14 AM, Peter Sewell wrote: Dear gcc list, we are trying to clarify what behaviour of C implementations is actually relied upon in modern practice, and what behaviour is guaranteed by curren

Re: ira.c update_equiv_regs patch causes gcc/testsuite/gcc.target/arm/pr43920-2.c regression

2015-04-17 Thread Jeff Law
On 04/17/2015 03:57 AM, Shiva Chen wrote: Hi, I think the rtl dump in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64916 is not jump2 phase rtl dump. Because jump2 is after ira, the register number should be hardware register number. the jump2 rtl dump should as follow ... 31: NOTE_INSN_B

Re: try_merge_delay_insn with delay list > 1

2015-04-17 Thread Jeff Law
On 03/10/2015 07:40 AM, BELBACHIR Selim wrote: Me again :) I enhanced my patch because it was not generalized for instructions with N delay_slots. Mostly OK, though there are some formatting nits that need to be corrected. We have whitespace around arithmetic, logical and comparison operators

Re: Questions about C as used/implemented in practice

2015-04-17 Thread Peter Sewell
On 17 April 2015 at 17:03, wrote: > On 04/17/2015 09:01 AM, Peter Sewell wrote: >> >> On 17 April 2015 at 15:19, wrote: >>> >>> On Apr 17, 2015, at 9:14 AM, Peter Sewell wrote: Dear gcc list, we are trying to clarify what behaviour of C implementations is act