Re: Scheduler:LLVM vs gcc, which is better

2014-03-12 Thread lin zuojian
On Tue, Mar 11, 2014 at 11:30:28AM +0800, lin zuojian wrote: > Hi Chandler, > Thanks a lot for your answer.It is pretty misleading to find out > that DAG has schedule unit. > -- > Regards > lin zuojian Hi Chandler, I have looked into their "Machine Instr Scheduler", and find out th

Re: [RFC] Meta-description for tree and gimple folding

2014-03-12 Thread Richard Biener
On Tue, 11 Mar 2014, Marc Glisse wrote: > On Mon, 3 Mar 2014, Richard Biener wrote: > > > > How do you handle a > > > transformation that currently tries to recursively fold something else and > > > does the main transformation only if that simplified? > > > > And doesn't do the other folding (b

Re: Scheduler:LLVM vs gcc, which is better

2014-03-12 Thread Renato Golin
On 12 March 2014 15:13, lin zuojian wrote: > Hi Chandler, > I have looked into their "Machine Instr Scheduler", and find out > that LLVM have not yet enable them by default.And further test find > they are still not yet working.(e.g,-mtune=cortex-a9,a15,a53 > generates the same cod

Re: [RFC] Meta-description for tree and gimple folding

2014-03-12 Thread Marc Glisse
On Wed, 12 Mar 2014, Richard Biener wrote: On Tue, 11 Mar 2014, Marc Glisse wrote: On Mon, 3 Mar 2014, Richard Biener wrote: How do you handle a transformation that currently tries to recursively fold something else and does the main transformation only if that simplified? And doesn't do t

Re: [RFC] Meta-description for tree and gimple folding

2014-03-12 Thread Richard Biener
On Wed, 12 Mar 2014, Marc Glisse wrote: > On Wed, 12 Mar 2014, Richard Biener wrote: > > > On Tue, 11 Mar 2014, Marc Glisse wrote: > > > > > On Mon, 3 Mar 2014, Richard Biener wrote: > > > > > > > > How do you handle a > > > > > transformation that currently tries to recursively fold something

Reg Alloc Problem.

2014-03-12 Thread Umesh Kalappa
Hi All, We are porting the gcc 4.8.1 to the new target and which has the pair 16 bit registers like AB or CD or EF and we modeled it in reg_class as AB,CD and DE 16 bit pair_regs and CD ,EF as 16 bit base_regs and A,B,C,D E and F as 8 bit as general_regs. We are stuck with below issues like

New .rodata section.

2014-03-12 Thread Umesh Kalappa
Hi All , We are porting gcc4.8.1 to the new target and we created the new .rodata section w.r.t flags by get_unnamed_section() . Now we need to associate the global %object data of type .word or .byte to the created .rodata section and also we need to emit the .rodata section in the asm fil

unwinding through signal frame on ARM

2014-03-12 Thread Peng Yuan
Hi, I'm using backtrace() to obtain call context by sending signals. But program segfaults if the first instruction of a function receives signal for backtrace. ARM unwinding in libgcc uses "return_address -= 2" to get the caller address. It is OK for normal function call with "bl xxx". But it ca

Re: unwinding through signal frame on ARM

2014-03-12 Thread Ian Lance Taylor
On Wed, Mar 12, 2014 at 8:33 AM, Peng Yuan wrote: > > I'm using backtrace() to obtain call context by sending signals. But > program segfaults if the first instruction of a function receives > signal for backtrace. > > ARM unwinding in libgcc uses "return_address -= 2" to get the caller > address.

BUG: Bad line number in a message

2014-03-12 Thread Bruce Korb
Hi, this is for 4.3.3, which is a bit old, so I'm not filing a bug. static inline void * get_resp_ptr(U32 bkade, U32 q_id) { blade_data_t * bd = bfr_blade_data + ssdId; bfr_pendcmd_q_t * pcq = bd->bfrpb_ques + q_id; blade_resp_t *res = pcq->bfrpq_resp; return (void *)(res +

Completing GCC Go escape analysis in GSoC 2014

2014-03-12 Thread Ray Li
Hi, I'm a student interested in working on GCC and want to make a proposal of GSoC 2014 on GCC Go escape analysis. I 've read code under /gcc/testsuit/go.* the some source code of gofrontend, and realization of escape analysis and furthermore optimization is needed. Right now I have come up with