On Wed, Jul 27, 2011 at 11:59 PM, Sandra Loosemore
wrote:
> Consider this bit of code:
>
> extern double a[20];
>
> double test1 (int n)
> {
> double accum = 0.0;
> int i;
>
> for (i=0; i accum = fabs (accum);
> return accum;
> }
>
> which is compiled for MIPS using
>
> mipsisa32r2-sde-elf-gc
On Wed, Jul 27, 2011 at 2:37 PM, H.J. Lu wrote:
> On Wed, Jul 27, 2011 at 2:23 PM, Joseph S. Myers
> wrote:
>> On Wed, 27 Jul 2011, H.J. Lu wrote:
>>
>>> ; Maximum number of mask bits in a variable.
>>> MaxMaskBits
>>> ix86_isa_flags = 64
>>>
>>> It mark ix86_isa_flags as 64bit. Any comments?
>>
On 07/28/2011 02:11 AM, Richard Guenther wrote:
On Wed, Jul 27, 2011 at 11:59 PM, Sandra Loosemore
wrote:
[snip]
So, here's my question. Is it worthwhile for me to continue this approach
of trying to make the MIPS backend smarter? Or is the way IRA deals with
CANNOT_CHANGE_MODE_CLASS fundam
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On 07/28/11 08:33, Sandra Loosemore wrote:
>
> I picked up when trying to analyze this problem, that seems scarier than
> just fixing it in the MIPS backend, but certainly not as scary as adding
> stuff to split live ranges to IRA. :-)
Splitting liv
Snapshot gcc-4.5-20110728 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.5-20110728/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.5 SVN branch
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Hi Sergey,
On Fri, 22 Jul 2011, Sergey Kutserey wrote:
> Hi there! I would like to host a new mirror in US, Missouri, Saint
> Louis. I have a server with alot free space and many bandwidth
> available. The mirror will have URL like gcc.petsads.us My email
> s.kutse...@gmail.com My name is Serge
