Truncating df to sf (and typo in code)

2011-04-13 Thread Paulo J. Matos
Hi, I have been looking at the fp-bit code and noticed: /* numeric parameters */ /* F_D_BITOFF is the number of bits offset between the MSB of the mantissa of a float and of a double. Assumes there are only two float types. (double::FRAC_BITS+double::NGARDS-(float::FRAC_BITS-float::NGARDS))

Re: Truncating df to sf (and typo in code)

2011-04-13 Thread Joseph S. Myers
On Wed, 13 Apr 2011, Paulo J. Matos wrote: > I have been looking at the fp-bit code and noticed: > In my port I am having some trouble with the truncation from df to sf. Unless your port is outside the scope of what soft-fp supports (for example, soft-fp probably won't work for systems with 16-

Announce: MELT plugin (0.7) release candidate 2 for GCC 4.6

2011-04-13 Thread Basile Starynkevitch
Hello All, I am announcing the release candidate #2 of the MELT plugin (v0.7), replacing the rc1 of http://gcc.gnu.org/ml/gcc/2011-04/msg00213.html You can download a gzipped tar source ball of MELT 0.7 as plugin for GCC 4.6 from http://gcc-melt.org/melt-0.7rc2-plugin-for-gcc-4.6.tgz It is a gzi

Using intrinsic functions to extend the isa

2011-04-13 Thread Feng LI
Hi, I'm currently try to add intrinsic functions to extend the x86 instruction set. Encountered a problem when the intrinsic function's return value is void, where the asm will not generate in this case. the intrinsic function looks like: extern void __attribute__((__gnu_inline__, __always_inlin

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Ian Lance Taylor
Feng LI writes: > I'm currently try to add intrinsic functions to extend the x86 instruction > set. Encountered a problem when the intrinsic function's return value > is void, where the asm will not generate in this case. > > the intrinsic function looks like: > > extern void > __attribute__((__g

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Feng LI
Hi Ian, Thanks for your comments. On Wed, Apr 13, 2011 at 5:02 PM, Ian Lance Taylor wrote: > Feng LI writes: > >> I'm currently try to add intrinsic functions to extend the x86 instruction >> set. Encountered a problem when the intrinsic function's return value >> is void, where the asm will no

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Ian Lance Taylor
Feng LI writes: > I use unspec_volatile for a function with void arguments and > void return value for some initialization work. But it didn't generate > code in this case. I think probably I need to add more restrictions > some where but I don't know why and how. The code looks like: > > extern

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Richard Guenther
On Wed, Apr 13, 2011 at 5:32 PM, Ian Lance Taylor wrote: > Feng LI writes: > >> I use unspec_volatile for a function with void arguments and >> void return value for some initialization work. But it didn't generate >> code in this case. I think probably I need to add more restrictions >> some whe

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Feng LI
On Wed, Apr 13, 2011 at 5:32 PM, Ian Lance Taylor wrote: > Feng LI writes: > >> I use unspec_volatile for a function with void arguments and >> void return value for some initialization work. But it didn't generate >> code in this case. I think probably I need to add more restrictions >> some whe

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Richard Guenther
On Wed, Apr 13, 2011 at 5:45 PM, Feng LI wrote: > On Wed, Apr 13, 2011 at 5:32 PM, Ian Lance Taylor wrote: >> Feng LI writes: >> >>> I use unspec_volatile for a function with void arguments and >>> void return value for some initialization work. But it didn't generate >>> code in this case. I th

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Feng LI
On Wed, Apr 13, 2011 at 5:48 PM, Richard Guenther wrote: > On Wed, Apr 13, 2011 at 5:45 PM, Feng LI wrote: >> On Wed, Apr 13, 2011 at 5:32 PM, Ian Lance Taylor wrote: >>> Feng LI writes: >>> I use unspec_volatile for a function with void arguments and void return value for some initia

Added myself to MAINTAINERS

2011-04-13 Thread Georg-Johann Lay
Added myself to MAINTAINERS. Please update your MAINTAINERS file. Johann Index: ChangeLog === --- ChangeLog (Revision 172381) +++ ChangeLog (Revision 172382) @@ -1,3 +1,7 @@ +2011-04-13 Georg-Johann Lay + + * MAINTAINE

Re: Using intrinsic functions to extend the isa

2011-04-13 Thread Richard Henderson
On 04/13/2011 09:05 AM, Feng LI wrote: >> You need to expand builtins yourself, a "named" expander doesn't do >> that for you. > > I'm not sure I understand this, I use define_expand to expand > the builtin function to RTX, and then define_insn * to match the > RTX and generate code. It seems it d

How to tell IRA to use misaligned DImode load?

2011-04-13 Thread H.J. Lu
Hi, On my target, SCmode is 4 byte aligned. But to load it into a register, it must be 8byte aligned. I can handle misaligned load in backend. But IRA generates misaligned load directly when SCmode is accessed as DImode. How can I tell IRA to use misaligned load for DImode? Thanks. -- H.J.

RE:How to tell IRA to use misaligned DImode load?

2011-04-13 Thread cirrus75
Hi, Do you mean you support unaligned access to any DImode regular type (int64_t) ? regards, Alex Prado "H.J. Lu" wrote: Hi, On my target, SCmode is 4 byte aligned. But to load it into a register, it must be 8byte aligned. I can handle misaligned load in backend. But IRA generates misa

Re: How to tell IRA to use misaligned DImode load?

2011-04-13 Thread H.J. Lu
On Wed, Apr 13, 2011 at 1:50 PM, cirrus75 wrote: > >  Hi, > >  Do you mean you support unaligned access to any DImode regular type > (int64_t) ? Real DImode support unaligned access. The problem is SCmode accessed via DImode. H.J. --- > regards, > Alex Prado > > > "H.J. Lu" wrote: > > Hi, > >

Re: How to tell IRA to use misaligned DImode load?

2011-04-13 Thread H.J. Lu
On Wed, Apr 13, 2011 at 12:55 PM, H.J. Lu wrote: > Hi, > > On my target, SCmode is 4 byte aligned.  But to load it into > a register, it must be 8byte aligned.  I can handle misaligned > load in backend.  But IRA generates misaligned load directly > when SCmode is accessed as DImode.  How can I te