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Hello.
Thank you for your help, now I understand much better how it works.
At last I began to make some source code to explore the tree, indeed the
macros are still the same except some.
But I have some questions again ...
I read that there is a variable global_namespace, I searched for it but
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Nicolas COLLIN writes:
> I read that there is a variable global_namespace, I searched for it
> but I didn't find anything. Would you know how I can get the root ?
global_namespace is specific to the C++ frontend. It is defined in
cp/name-lookup.c.
I'm not sure what you mean by "the root," but
Hi GCC team,
I built GCC 4.4.0 on a SPARC system running Solaris 10
The build went through without any error,
but most of the tests failed in "make check".
unexpected failures = 6472 and passed = 52.
Output from gcc -v and fragment from make check are below.
What am I doing wrong?
Is this b
> The build went through without any error,
> but most of the tests failed in "make check".
> unexpected failures = 6472 and passed = 52.
Try with "make -k check" and no -j, parallel testing is broken on Solaris.
--
Eric Botcazou
Except if I'm mistaken, force_reg will generally call gen_reg_rtx
which does check for those two flags internally (via
can_create_pseudo_p). So you should not have that error in this case.
I suggest you use a debug_rtx on the operand that's a problem, and
first check if gen_reg_rtx is used to crea
On Mon, May 11, 2009 at 04:45:26PM -0700, Jamie Prescott wrote:
>
> Hi!
> I wanted to add finer (one per) register subclasses, so that I can more
> finely control
> the register placement inside the inline assembly.
> These are the relevant definitions inside my include file:
>
> enum reg_class
- Original Message
> From: Michael Meissner
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 11:38:18 AM
> Subject: Re: Extending constraints using register subclasses
>
> On Mon, May 11, 2009 at 04:45:26PM -0700, Jamie Prescott wrote:
> >
> > Hi!
> > I wante
This is driving me crazy. Any memory op that tries to write over [SP] get's
automatically nuked
by the compiler.
Any offset, positive or negative, from SP, has no problems.
What did I do wrong this time?
- Jamie
Snapshot gcc-4.5-20090514 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.5-20090514/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.5 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/trunk
- Original Message
> From: Michael Meissner
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 11:38:18 AM
> Subject: Re: Extending constraints using register subclasses
>
> On Mon, May 11, 2009 at 04:45:26PM -0700, Jamie Prescott wrote:
> >
> > Hi!
> > I wante
On Thu, May 14, 2009 at 04:22:13PM -0700, Jamie Prescott wrote:
> OK, I tried reordering the classes by putting smaller ones first. Did not
> work.
> As far as IRA_COVER_CLASS, this should be a new thing, isn't it? I'm currently
> on 4.3.3 and I found no mention of it anywhere.
Yes, it was added
- Original Message
> From: Jamie Prescott
> To: Michael Meissner
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 4:22:13 PM
> Subject: Re: Extending constraints using register subclasses
> OK, I tried reordering the classes by putting smaller ones first. Did not
> work.
> As far a
- Original Message
> From: Jamie Prescott
> To: Jamie Prescott ; Michael Meissner
>
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 5:36:14 PM
> Subject: Re: Extending constraints using register subclasses
>
> - Original Message
> > From: Jamie Prescott
> > To: Michael
The VM I'm retargeting GCC to, has an instruction that allows to store/load
multiple,
a consecutive range of registers, to a memory operand.
I noticed that sometime the registers allocated by GCC are sparse, and this
prevents
the store/load multiple optimization from happening (I have to issue s
Hi,
One of the RTEMS GSoC students is running into a
problem building avr-elf toolset as a precursor
to modifying avr-rtems. Josh is getting an
error which indicates a configure inconsistency.
I have tried building this toolset on two
different machines and have no problems.
I even sent him a sc
Jamie Prescott writes:
> The VM I'm retargeting GCC to, has an instruction that allows to store/load
> multiple,
> a consecutive range of registers, to a memory operand.
> I noticed that sometime the registers allocated by GCC are sparse, and this
> prevents
> the store/load multiple optimizati
Joel Sherrill writes:
> Configuring in avr-elf/libgcc
> configure: loading cache ./config.cache
> configure: error: `CC' has changed since the previous run:
The change is that these options are new:
-nostdinc -B/home/cain/avr-tools/gcc/avr-elf/newlib/ -isystem
/home/cain/avr-tools/gcc/avr-elf/
- Original Message
> From: Ian Lance Taylor
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 8:57:08 PM
> Subject: Re: Compact regsiter allocation
>
> Jamie Prescott writes:
>
> > The VM I'm retargeting GCC to, has an instruction that allows to store/load
>
Jamie Prescott writes:
>> Normally gcc will allocate registers in the order they are listed in
>> REG_ALLOC_ORDER, which defaults to increasing numeric order. gcc won't
>> normally allocate register sparsely. That said, it is quite possible
>> for gcc to allocate a register and then discover th
> From: Ian Lance Taylor
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 10:09:40 PM
> Subject: Re: Compact regsiter allocation
>
> Jamie Prescott writes:
>
> >> Normally gcc will allocate registers in the order they are listed in
> >> REG_ALLOC_ORDER, which defaults
Workshop on Essential Abstractions in GCC, 2009
(http://www.cse.iitb.ac.in/grc/gcc-workshop-09)
-
Organized by: GCC Resource Center (http://www.cse.iitb.ac.in/grc).
Venue: Department
Hello,
In 'SSA Operands' node, tree-ssa.texi, the original text are
"
For instance, given
@smallexample
@{
int a, b;
a = b
@}
@end smallexample
Since @code{a} and @code{b} are non-aliased locals, the statement
@code{a = b} will have one real definition and one real use because
variable @cod
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