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acats test cxg2014 hangs forever on hppa2.0w-hp-hpux11.00.
Killing the process terminates the acats testsuite.
The directory gcc/testsuite/ada/acats/tests/cxg/cxg2014 contains a cyg2014.log
file:
,.,. CXG2014 ACATS 2.5 06-02-10 18:02:32
- CXG201
Hi All.
While I have debugging AVR target bug I found that something wrong in
port code or in reload.
Is it right to use of get_frame_size() inside CAN_ELIMINATE macro valid ?
If yes then reload have a bug.
If no then AVR and probably MIPS ports have invalid definitions of
CAN_ELIMINATE.
Denis.
I've had both a lot of work and a lot of travel to get done over the
past week; unfortunately, that's not permitted me to spend as much time
as I would have liked doing RM stuff. Although I've not been saying
much, I have been watching carefully, and I'm glad to see that progress
has been made for
On Feb 13, 2006, at 7:43 AM, Denis Chertykov wrote:
Hi All.
While I have debugging AVR target bug I found that something wrong in
port code or in reload.
Is it right to use of get_frame_size() inside CAN_ELIMINATE macro
valid ?
If yes then reload have a bug.
If no then AVR and probably MIP
Eric Christopher <[EMAIL PROTECTED]> writes:
> On Feb 13, 2006, at 7:43 AM, Denis Chertykov wrote:
>
> > Hi All.
> >
> > While I have debugging AVR target bug I found that something wrong in
> > port code or in reload.
> >
> > Is it right to use of get_frame_size() inside CAN_ELIMINATE macro
> >
Gabriel Dos Reis wrote:
> Tom Tromey <[EMAIL PROTECTED]> writes:
>
> [...]
>
> | I think it would be more advisable to design something with AST
> | database generation as an explicit goal.
>
> I believe that is a sensible approach, one that I thought a by-product
> of the "Link Time Optimizatio
Hi,
looking into gcc source code, I noticed that in some structure definition
'bool' was used and in other ones bitfields were used. In some other cases
there is also a mix of the two ! (for exemple in 'dwarf2out.c' - struct
dw_fde_struct). Finaly, some even defined a BOOL_BITFIELD which looks lik
> acats test cxg2014 hangs forever on hppa2.0w-hp-hpux11.00.
This is PR ada/13408. I see that I opened this back in 2003.
It probably has something to do with the IEEE quad support.
Dave
--
J. David Anglin [EMAIL PROTECTED]
National Research Council of Canada
Aldy Hernandez wrote:
> So far the way I've envisioned (correct me if I'm wrong please), is to
> add 2 entries to struct function: one for a hash table which will be
> freed when we're done parsing the function, and one containing the
> vector of used types.
I was hoping you could use a union of
Hi,
Happy Valentine's Day.
Suppose I have only pc-relative branch instructions such as 'b offset'
and don't have pc-region branch instructions such as 'j target'. So
what the function call should be translated? Do I have to always use
two instructions such as 'la reg, func' and 'b reg'? Especially
On Feb 13, 2006, at 7:28 PM, Eric Fisher wrote:
Suppose I have only pc-relative branch instructions such as 'b offset'
and don't have pc-region branch instructions such as 'j target'. So
what the function call should be translated? Do I have to always use
two instructions such as 'la reg, fun
Thanks. I'm working to port gcc to our chip. I use mips-elf as the start. Yet,
we don't have pc-region branch instructions such as 'j target'. So I'm
confused how to solve the function call translation. Thanks again.
Eric.
2006/2/14, Mike Stump <[EMAIL PROTECTED]>:
> On Feb 13, 2006, at 7:28 PM,
On Feb 13, 2006, at 8:31 PM, Eric Fisher wrote:
Thanks. I'm working to port gcc to our chip. I use mips-elf as the
start. Yet,
we don't have pc-region branch instructions such as 'j target'. So I'm
confused how to solve the function call translation. Thanks again.
If you don't have a jump t
On Feb 13, 2006, at 8:31 PM, Eric Fisher wrote:
Thanks. I'm working to port gcc to our chip. I use mips-elf as the
start.
Most chips have this same issue, you can copy from ppc for example,
or arm, if your chip is more like it (hope not).
we don't have pc-region branch instructions such a
This is the beta release of binutils 2.16.91.0.6 for Linux, which is
based on binutils 2006 0212 in CVS on sources.redhat.com plus various
changes. It is purely for Linux.
The new x86_64 assembler no longer accepts
monitor %eax,%ecx,%edx
You should use
monitor %rax,%ecx,%edx
or
> Also are you doing pic code or non-pic code? Is your chip a mips clone?
Both pic and non-pic codes are supported. The chip has some features
from arm, such as conditional execution, scaled immediate, pc-relative
branch. I choose mips-elf as start just because we are familiar with
mips and that s
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