Re: volatile and R/M/W operations

2007-12-03 Thread Robert Dewar
Richard Kenner wrote: t1 = y | 2; y = t1; are very hard to tell apart at the RTL level. Though it's clear that a single instruction might best match the expect semantics of the former, it's a lot less clear that it would for the latter. I think it would still be OK for the latt

Re: volatile and R/M/W operations

2007-12-03 Thread Richard Kenner
> > t1 = y | 2; > > y = t1; > > > > are very hard to tell apart at the RTL level. Though it's clear that > > a single instruction might best match the expect semantics of the former, > > it's a lot less clear that it would for the latter. > > I think it would still be OK for the latter,

Re: volatile and R/M/W operations

2007-12-03 Thread Robert Dewar
Richard Kenner wrote: Right, but it would seem this is a good canididate for combination. This is especially true since often Volatile is used with the sense of Atomic in Ada, and it is not a bad idea to combine these in practice, giving an atomic update (right, nothing in the language requires i

Re: volatile and R/M/W operations

2007-12-03 Thread Richard Kenner
> Right, but it would seem this is a good canididate for combination. This > is especially true since often Volatile is used with the sense of Atomic > in Ada, and it is not a bad idea to combine these in practice, giving an > atomic update (right, nothing in the language requires it, but it is > d

Re: volatile and R/M/W operations

2007-12-03 Thread Robert Dewar
Richard Kenner wrote: OK, sounds reasonable, but then I don't understand the logic behind avoiding this instruction sequence for the volatile case, this is two accesses at the bus level so what's the difference? There's no difference from that perspective. The logic behind what's generated is

Re: volatile and R/M/W operations

2007-12-03 Thread Richard Kenner
> OK, sounds reasonable, but then I don't understand the logic behind > avoiding this instruction sequence for the volatile case, this is > two accesses at the bus level so what's the difference? There's no difference from that perspective. The logic behind what's generated is that instead of tr

Re: volatile and R/M/W operations

2007-12-02 Thread Robert Dewar
Samuel Tardieu wrote: For this pattern (isolated setting of one bit in the middle of a byte at a random memory location), this is the best code on this platform AFAIK. As an evidence, if you mark neither variable as volatile GCC generates with -O3 -fomit-frame-pointer: f: orb $16,

Re: volatile and R/M/W operations

2007-12-02 Thread Samuel Tardieu
On 1/12, Robert Dewar wrote: >> I cannot see a reason not to use "orb $32,y" here instead of a three >> steps read/modify/write operation. Is this only a missed optimization? >> (in which case I will open a PR) > > Are you sure it is an optimization, the timing on these things is > very subtle. W

Re: volatile and R/M/W operations

2007-12-01 Thread Robert Dewar
Samuel Tardieu wrote: When looking at an Ada PR, I stumbled upon the equivalent of the following C code: unsigned char x; volatile unsigned char y; void f () { x |= 16; y |= 32; } With trunk/i686, the following code is generated (-O3 -fomit-frame-pointer): f: movzbl y

Re: volatile and R/M/W operations

2007-11-30 Thread Richard Kenner
> volatile unsigned char y; > void f () > { > y |= 32; > } > > I cannot see a reason not to use "orb $32,y" here instead of a three > steps read/modify/write operation. Is this only a missed optimization? No, it's purposeful. The idea was that this is completely equivalent to y =

volatile and R/M/W operations

2007-11-30 Thread Samuel Tardieu
When looking at an Ada PR, I stumbled upon the equivalent of the following C code: unsigned char x; volatile unsigned char y; void f () { x |= 16; y |= 32; } With trunk/i686, the following code is generated (-O3 -fomit-frame-pointer): f: movzbl y, %eax orb $