Re: reduction of GP registers in MIPS backend

2006-08-01 Thread Joern RENNECKE
kernel coder wrote: Would you please give a bit more explaination of "GPRs come in pairs" and where this assumption is being checked in function override_options. It doesn't, that's why $24 gets marked as suitable for DImode in mips_hard_regno_mode_ok.

Re: reduction of GP registers in MIPS backend

2006-07-31 Thread Jim Wilson
kernel coder wrote: Would you please give a bit more explaination of "GPRs come in pairs" and where this assumption is being checked in function override_options. These two lines else if (GP_REG_P (regno)) temp = ((regno & 1) == 0 || size <= UNITS_PER_WORD); which say tha

Re: reduction of GP registers in MIPS backend

2006-07-31 Thread kernel coder
This violates an assumption in mips.c:override_options that GPRs come in pairs. Thus you end up with (reg/v:DI 24 $24 [orig:55 res2 ] [55]), which does not satisfy the 'd' constraint. Would you please give a bit more explaination of "GPRs come in pairs" and where this assumption is being checke

reduction of GP registers in MIPS backend

2006-07-31 Thread Joern RENNECKE
In http://gcc.gnu.org/ml/gcc/2006-07/msg00632.html, you wrote: dp-bit.c: In function '__muldf3': dp-bit.c:953: error: insn does not satisfy its constraints: (insn 677 231 616 19 dp-bit.c:871 (set (reg/v:DI 24 $24 [orig:55 res2 ] [55]) (reg:DI 2 $2)) 3 {*movdi_32bit} (nil) (nil)) dp-bit.c:

reduction of GP registers in MIPS backend

2006-07-31 Thread kernel coder
hi, I'm trying to learn mips backend by making some changes to it.I just tried to decrease the number of general purpose registers to 25 but following error was generated. dp-bit.c: In function '__muldf3': dp-bit.c:953: error: insn does not satisfy its constraints: (insn 677 231 616 19 dp-bit.c