Re: [resend] implement assembly variant routines for IEEE floating-point under libgcc for cortex-m0

Mallikarjun, Thanks for trying this. I agree with you that current C implementation is far from optimal. It is in our road-map with a different approach, which will not simply port current functions from armv7-m to armv6-m. This task is low priority due to less common usage of fp in Cortex-M0*, s

[resend] implement assembly variant routines for IEEE floating-point under libgcc for cortex-m0

Hi All, sorry, sending previous mail with proper subject line. For cortex-m0 (armv6-m) target, i observed that ieee floating-point functions under libgcc are implemented in C. This takes lot of memory if one uses floating-point in their applciations. I agree that usage of fp in cortex-m0 devices

implement assembly variant routines for IEEE floating-point under libgcc

Hi All, For cortex-m0 (armv6-m) target, i observed that ieee floating-point functions under libgcc are implemented in C. This takes lot of memory if one uses floating-point in their applcations. I agree that usage of fp in cortex-m0 devices might be minimal. I wanted to check if its good idea to