we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
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View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
--
View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
--
View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
ddmetro writes:
> 1. We are expecting that pass_sched and pass_sched2, each will enter
> schedule_insns() function once per pass. However, we found that it is
> entering schedule_insns() function per function(in the program) per pass.
> (If there are two functions in the input program, pass_sched
we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
--
View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
--
View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
we missing
out?
Target language for which optimization is being done: C
Target machine architecture: i686
GCC version: 4.4.1
Kindly help us with our issues.
Thanking You,
Dhiraj Padnani
--
View this message in context:
http://old.nabble.com/help-on---instruction-scheduling-passes-in-gcc
