From: Eric Botcazou
Date: Thu, 27 Oct 2011 23:55:00 +0200
>> I quickly tried the patch below, but this does not prevent the
>> transformation.
>
> The quoted code is in copyprop_hardreg_forward_1.
Indeed :-)
This patch below works for the specific test case, and I'll post to
gcc-patches and co
> I quickly tried the patch below, but this does not prevent the
> transformation.
The quoted code is in copyprop_hardreg_forward_1.
--
Eric Botcazou
From: Eric Botcazou
Date: Thu, 27 Oct 2011 23:11:33 +0200
>> Sorry, the final path component should be "mzero2.c"
>
> Thanks. I think we that need the same treatment in:
...
> as:
...
> i.e. we need to bail out if we are narrowing and this is a big-endian target.
I quickly tried the patch be
> Sorry, the final path component should be "mzero2.c"
Thanks. I think we that need the same treatment in:
/* If we are accessing SRC in some mode other that what we
set it in, make sure that the replacement is valid. */
if (mode != vd->e[regno].mode)
From: Eric Botcazou
Date: Thu, 27 Oct 2011 15:17:40 +0200
>> On 64-bit sparc, integer regs are 64-bit and float regs are
>> (basically) 32-bit. So HARD_REGNO_NREGS(float_reg, DFmode) is 2, and
>> HARD_REGNO_NREGS(integer_reg, DImode) is 1.
>>
>> cprop sees the sequence:
>>
>> (insn 330 172 230 .
From: Eric Botcazou
Date: Thu, 27 Oct 2011 15:17:40 +0200
>> To reproduce build gcc.c-torture/execute/ieee/mzero.c with
>> "-m64 -mcpu=niagara3 -O2" on sparc.
>
> AFAICS there is no such file as gcc.c-torture/execute/ieee/mzero.c.
Sorry, the final path component should be "mzero2.c"
> On 64-bit sparc, integer regs are 64-bit and float regs are
> (basically) 32-bit. So HARD_REGNO_NREGS(float_reg, DFmode) is 2, and
> HARD_REGNO_NREGS(integer_reg, DImode) is 1.
>
> cprop sees the sequence:
>
> (insn 330 172 230 .. (set (reg:DI %g2) const_int)
> (insn 171 330 173 .. (set (reg:DF
Although copy_value() in regcprop.c tries to avoid recording cases
where substitutions would be illegal, there are some bad cases it
still can let through.
On 64-bit sparc, integer regs are 64-bit and float regs are
(basically) 32-bit. So HARD_REGNO_NREGS(float_reg, DFmode) is 2, and
HARD_REGNO_
