Re: conflict between scheduler and register allocator

2013-10-28 Thread shmeel gutl
On 09-Aug-13 07:35 PM, Vladimir Makarov wrote: On 13-08-09 7:25 AM, shmeel gutl wrote: I am having trouble meeting the constraints of the scheduler and the register allocator for my back end. The relevant features are: 1) VLIW - up to 4 instructions can be issued each cycle 2) If a vliw bundle

Re: conflict between scheduler and register allocator

2013-08-09 Thread Vladimir Makarov
On 13-08-09 7:25 AM, shmeel gutl wrote: I am having trouble meeting the constraints of the scheduler and the register allocator for my back end. The relevant features are: 1) VLIW - up to 4 instructions can be issued each cycle 2) If a vliw bundle has both a set and a use, the use will use the

conflict between scheduler and register allocator

2013-08-09 Thread shmeel gutl
I am having trouble meeting the constraints of the scheduler and the register allocator for my back end. The relevant features are: 1) VLIW - up to 4 instructions can be issued each cycle 2) If a vliw bundle has both a set and a use, the use will use the old values. 3) A call instruction will p