On 08/16/2016 03:10 AM, shmuel gutl wrote:
My hardware directly supports instructions of the form
subreg:SI(reg:VEC v1,3) = SI:a1
Subregs of hard registers should be avoided. They are primarily useful
for pseudo regs. Subregs that aren't lowpart subregs should be avoided
also. Except w
My hardware directly supports instructions of the form
subreg:SI(reg:VEC v1,3) = SI:a1
That is, a particular field of a vector register can be used as the
target of a move from a general register. Reginfo refuses to recognize
that any registers can satisfy this subreg expression and theref
