Hi Roy,
I guess SMS didn't pipeline your loop, and the
"prologue" code mentioned in your email is
an iteration peeled off from the loop. It has
nothing to do with prologue code.
I think there are two reasons that can explain why
your code is not pipelined:
1. Alias information is not enough to d
I have tried to play a bit with SMS on ia64 and I can't understand
what it is doing.
It seems that instead of getting some of the first insns out of the
loop into the prologue it simply gets an entire iteration out of the
loop and the loop's content stays approximately the same.
For example for
v
Hi,
On 10.11.2010 12:32, roy rosen wrote:
Hi,
I was wondering if gcc has software pipelining.
I saw options -fsel-sched-pipelining -fselective-scheduling
-fselective-scheduling2 but I don't see any pipelining happening
(tried with ia64).
Is there a gcc VLIW port in which I can see it working?
Y
Hi Ayal,
Thanks for the inputs, I will try this on GCC 4.0, which sounds quite
interesting.
regards,
Vasanth
On 6/15/05, Ayal Zaks <[EMAIL PROTECTED]> wrote:
>
>
>
>
> > Vasanth <[EMAIL PROTECTED]>
>
> > I am using powerpc-eabi-gcc (3.4.1) and trying to retarget it for a
> > fully pipelined
> Vasanth <[EMAIL PROTECTED]>
> I am using powerpc-eabi-gcc (3.4.1) and trying to retarget it for a
> fully pipelined FPU. I have a DFA model for the FPU. I am looking at
> the code produced for a simple FIR algorithm (a loop iterating over an
> array, with a multiply-add operation per iterati
> Vasanth writes:
Vasanth> My question is, am I expecting the wrong version of GCC to be doing
Vasanth> this. I saw the following thread about SMS.
Vasanth> http://gcc.gnu.org/ml/gcc/2003-09/msg00954.html
Vasanth> that seems relevant. Would GCC 4.x be a better version for my
Vasanth> requir
