On 12-03-23 3:47 PM, Frédéric RISS wrote:
Hi Valdimir
Le vendredi 23 mars 2012 à 12:08 -0400, Vladimir Makarov a écrit :
Since 4.7 we use more sophisticated trivial coloring criteria which work
well even on intersected register classes. To be more accurate, we
calculate an approximation of an
Hi Valdimir
Le vendredi 23 mars 2012 à 12:08 -0400, Vladimir Makarov a écrit :
> Since 4.7 we use more sophisticated trivial coloring criteria which work
> well even on intersected register classes. To be more accurate, we
> calculate an approximation of an profitable hard regs for each pseudo.
Vladimir,
Thanks for for the explanation.
Cheers,
Paulo Matos
On 23/03/12 16:08, Vladimir Makarov wrote:
On 03/23/2012 11:04 AM, Paulo J. Matos wrote:
Hello,
I am trying to find exactly what happened to IRA_COVER_CLASSES in
gcc47. From what I have seen it seems that it was simply removed. D
On 03/23/2012 11:04 AM, Paulo J. Matos wrote:
Hello,
I am trying to find exactly what happened to IRA_COVER_CLASSES in
gcc47. From what I have seen it seems that it was simply removed. Does
the register allocator now automatically computes the cover classes?
No. Before gcc4.7 we use colorin
DJ Delorie wrote:
Opening this up to the gcc public, since I appear to be unable to get
this to work right.
Still no luck defining a working IRA_COVER_CLASSES for m32c. My
latest attempt:
#define IRA_COVER_CLASSES \
{ \
HC_REGS, MEM_REGS, LIM_REG_CLASSES\
}
[ ... ]
I actually got a
> Sure, DJ. I'll look at this but unfortunately I can do it on next week
> because I am busy with numerous other IRA bugs.
Next week would be fine :-)
> As I wrote m32c is pretty nasty case and may be will need even insn
> description changes.
I'm OK with that.
DJ Delorie wrote:
Opening this up to the gcc public, since I appear to be unable to get
this to work right.
Still no luck defining a working IRA_COVER_CLASSES for m32c. My
latest attempt:
#define IRA_COVER_CLASSES \
{ \
HC_REGS, MEM_REGS, LIM_REG_CLASSES\
}
(effectively GENERAL_REGS (w
> I think our mxp is more 'interesting'. [snip]
I think it's more like 'insane', :-) and a miracle that a retargetable
compiler can be ported to it.
Paolo
As I've said before, m32c is probably a "worst case" scenario for gcc
as it has not one, not two, not even three, but FOUR different types
of registers (8/16 bit general, 16 bit only general, 24 bit address
registers, and control (incl $fp) registers), and only a small number
(2) of each.
I think
DJ Delorie wrote:
Opening this up to the gcc public, since I appear to be unable to get
this to work right.
Still no luck defining a working IRA_COVER_CLASSES for m32c. My
latest attempt:
#define IRA_COVER_CLASSES \
{ \
HC_REGS, MEM_REGS, LIM_REG_CLASSES\
}
(effectively GENERAL_REGS (w
Opening this up to the gcc public, since I appear to be unable to get
this to work right.
Still no luck defining a working IRA_COVER_CLASSES for m32c. My
latest attempt:
#define IRA_COVER_CLASSES \
{ \
HC_REGS, MEM_REGS, LIM_REG_CLASSES\
}
(effectively GENERAL_REGS (which I also tried),
Hans-Peter Nilsson wrote:
I think the necessity and urgency of IRA_COVER_CLASSES, calls
for a few more details to be documented.
tm.texi says for it:
Cover classes are a set of non-intersecting register
classes covering all hard registers used for register allocation
purposes.
Ok, so I can cons
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