Richard,
As always thanks for the insight. I'll take a look at those functions as
well.
-Tucker
On Tue, Jan 12, 2021 at 8:37 AM Richard Biener
wrote:
> On Tue, Jan 12, 2021 at 4:29 PM Tucker Kern wrote:
> >
> > > So you are saying that a 16bit data word in IMEM is actually two 12bit
> > > dat
On Tue, Jan 12, 2021 at 4:29 PM Tucker Kern wrote:
>
> > So you are saying that a 16bit data word in IMEM is actually two 12bit
> > data words (supposedly only the lower 8 bits used in each) and thus the
> > array contains "padding"?
>
> Effectively yes. The assembler handles dividing constants in
> So you are saying that a 16bit data word in IMEM is actually two 12bit
> data words (supposedly only the lower 8 bits used in each) and thus the
> array contains "padding"?
Effectively yes. The assembler handles dividing constants into their LSB
and MSB components. I have insn patterns and split
On Sat, Jan 9, 2021 at 12:24 AM Tucker Kern via Gcc wrote:
>
> Hi,
>
> I'm implementing named addresses spaces for a Harvard architecture machine
> to support copying data from instruction memory to data memory. This is
> achieved via a special instruction. e.g. think AVR and progmem/__flash.
>
>
