On Tue, Oct 01, 2019 at 01:12:06PM +0100, Andrew Stubbs wrote:
> On 23/09/2019 15:39, Andrew Stubbs wrote:
> >On 23/09/2019 15:15, Segher Boessenkool wrote:
> >>On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
> >>> [(set (match_operand:DI 0 "register_operand" "=Sg,v")
> >>>
On 23/09/2019 15:39, Andrew Stubbs wrote:
On 23/09/2019 15:15, Segher Boessenkool wrote:
On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
[(set (match_operand:DI 0 "register_operand" "=Sg,v")
(ashift:DI
(match_operand:DI 1 "gcn_alu_operand" " Sg,v")
Andrew Stubbs writes:
> On 23/09/2019 15:15, Segher Boessenkool wrote:
>> On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
>>>[(set (match_operand:DI 0 "register_operand" "=Sg,v")
>>> (ashift:DI
>>>(match_operand:DI 1 "gcn_alu_operand" " Sg,v")
>>>
On 9/23/19 9:26 AM, Andrew Stubbs wrote:
> On 23/09/2019 16:21, Segher Boessenkool wrote:
>> Pass the register class or constraint or something like that to the hook,
>> then based on what the hook returns, either or not do the reject? So
>> your
>> hook would special-case SCC_CONDITIONAL_REG, may
On 23/09/2019 16:21, Segher Boessenkool wrote:
Pass the register class or constraint or something like that to the hook,
then based on what the hook returns, either or not do the reject? So your
hook would special-case SCC_CONDITIONAL_REG, maybe a few more similar ones
(those are confusing names
On Mon, Sep 23, 2019 at 03:39:08PM +0100, Andrew Stubbs wrote:
> On 23/09/2019 15:15, Segher Boessenkool wrote:
> >On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
> >> [(set (match_operand:DI 0 "register_operand" "=Sg,v")
> >> (ashift:DI
> >> (match_operand:DI 1
On 23/09/2019 15:15, Segher Boessenkool wrote:
On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
[(set (match_operand:DI 0 "register_operand" "=Sg,v")
(ashift:DI
(match_operand:DI 1 "gcn_alu_operand" " Sg,v")
(match_operand:SI 2 "gcn_alu_operand" "
On Mon, Sep 23, 2019 at 11:56:27AM +0100, Andrew Stubbs wrote:
> [(set (match_operand:DI 0 "register_operand" "=Sg,v")
> (ashift:DI
> (match_operand:DI 1 "gcn_alu_operand" " Sg,v")
> (match_operand:SI 2 "gcn_alu_operand" " Sg,v")))
>(clobber (match_scratch:BI 3
On Mon, Sep 23, 2019 at 12:56 PM Andrew Stubbs wrote:
>
> Hi All,
>
> I'm trying to figure out how to prevent LRA selecting alternatives that
> result in values being copied from A to B for one instruction, and then
> immediately back from B to A again, when there are apparently more
> sensible al
Hi All,
I'm trying to figure out how to prevent LRA selecting alternatives that
result in values being copied from A to B for one instruction, and then
immediately back from B to A again, when there are apparently more
sensible alternatives available.
I have an insn with the following patter
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