On 01/22/10 06:23, Mohamed Shafi wrote:
2010/1/22 Richard Henderson:
On 01/21/2010 06:22 AM, Mohamed Shafi wrote:
Hello all,
I am doing a port for a 32bit a target in GCC 4.4.0. The target
supports (base + offset) addressing mode for QImode store instructions
but not for QImode load
2010/1/22 Richard Henderson :
> On 01/21/2010 06:22 AM, Mohamed Shafi wrote:
>>
>> Hello all,
>>
>> I am doing a port for a 32bit a target in GCC 4.4.0. The target
>> supports (base + offset) addressing mode for QImode store instructions
>> but not for QImode load instructions. GCC doesn't take the
On 01/21/2010 06:22 AM, Mohamed Shafi wrote:
Hello all,
I am doing a port for a 32bit a target in GCC 4.4.0. The target
supports (base + offset) addressing mode for QImode store instructions
but not for QImode load instructions. GCC doesn't take the middle
path. It either supports an addressing
Hello all,
I am doing a port for a 32bit a target in GCC 4.4.0. The target
supports (base + offset) addressing mode for QImode store instructions
but not for QImode load instructions. GCC doesn't take the middle
path. It either supports an addressing mode completely and doesn't
support at all. I t