Hi Markus,
Markus L wrote:
Thank you very much for your detailed response!
I suspect your machine description says that dependency between loads and
multiply-add has zero latency, thus allowing the scheduler to place them
into
one instruction group. Grep for various comments about tick_check_
Thank you very much for your detailed response!
> I suspect your machine description says that dependency between loads and
> multiply-add has zero latency, thus allowing the scheduler to place them
> into
> one instruction group. Grep for various comments about tick_check_p
> function.
> In verb
Hi,
On Tue, 27 Oct 2009, Markus L wrote:
Hi,
I recently read the articles about the selective scheduling
implementation and found it quite interesting, I especially liked the
idea of how neatly software pipelining is integrated. The target I am
working on is a VLIW DSP so obviously these thing
Hi,
I recently read the articles about the selective scheduling
implementation and found it quite interesting, I especially liked the
idea of how neatly software pipelining is integrated. The target I am
working on is a VLIW DSP so obviously these things are very important
for good code generation
