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On 08/12/11 04:00, Paulo J. Matos wrote:
> On Thu, Aug 11, 2011 at 3:27 PM, Vladimir Makarov
> wrote:
>> Yes, that is mostly correct. The first could be done by -fweb (if
>> the live range where the pseudo is equal to the constant is
>> disjoint). T
On Fri, Aug 12, 2011 at 3:21 PM, Vladimir Makarov wrote:
>
> Sorry, Paulo. I don't think it is a good idea to have such a general pass.
Thanks for the observation and the points you made. I understand and
agree that this should be sorted at the IRA level. What I might do in
the meantime is to im
On 08/12/2011 06:00 AM, Paulo J. Matos wrote:
On Thu, Aug 11, 2011 at 3:27 PM, Vladimir Makarov wrote:
Yes, that is mostly correct. The first could be done by -fweb (if the live
range where the pseudo is equal to the constant is disjoint). The first
could be done also by Jeff Law's project
On Thu, Aug 11, 2011 at 3:27 PM, Vladimir Makarov wrote:
> Yes, that is mostly correct. The first could be done by -fweb (if the live
> range where the pseudo is equal to the constant is disjoint). The first
> could be done also by Jeff Law's project which can provide splitting not
> only on th
On 08/11/2011 04:49 AM, Richard Guenther wrote:
On Thu, Aug 11, 2011 at 10:11 AM, Paulo J. Matos wrote:
On Thu, Aug 11, 2011 at 1:01 AM, Vladimir Makarov wrote:
I can not reproduce the problem. It would be nice to give all info (the
code without includes and all options). In this case I cou
On Thu, Aug 11, 2011 at 1:01 AM, Vladimir Makarov wrote:
> I can not reproduce the problem. It would be nice to give all info (the
> code without includes and all options). In this case I could have more info
> to say more definitely about the reason of the problem in IRA.
>
Let me add another
On Thu, Aug 11, 2011 at 10:11 AM, Paulo J. Matos wrote:
> On Thu, Aug 11, 2011 at 1:01 AM, Vladimir Makarov wrote:
>> I can not reproduce the problem. It would be nice to give all info (the
>> code without includes and all options). In this case I could have more info
>> to say more definitely
On Thu, Aug 11, 2011 at 1:01 AM, Vladimir Makarov wrote:
> I can not reproduce the problem. It would be nice to give all info (the
> code without includes and all options). In this case I could have more info
> to say more definitely about the reason of the problem in IRA.
>
One of the issue wi
On 10/08/11 14:51, Richard Guenther wrote:
I think it's all happening in generic code via do_store_flag.
ah, now I understand your previous question. I wonder if it's not
triggered because I don't have cstore4 defined. Might be that but
I have to look deeper.
--
PMatos
On 10/08/11 12:42, Richard Guenther wrote:
Oh, and I wonder if/why IRA can/does not rematerialize the constant
instead of spilling it. Might be a cost issue that it doesn't delay
allocating a reg for 1 as that is cheap to reload (is it?).
I would indeed expect IRA to move the constant assign
On Wed, Aug 10, 2011 at 3:46 PM, Paulo J. Matos wrote:
> On 10/08/11 12:40, Richard Guenther wrote:
>>
>> On x86 we expand the code to ((xl& al) ^ al) | ((xh& ah) ^ ah) == 0
>> which is then if-converted. Modified testcase:
>>
>> long long x;
>> _Bool __attribute__((regparm(2))) mask (long long
On 10/08/11 12:40, Richard Guenther wrote:
On x86 we expand the code to ((xl& al) ^ al) | ((xh& ah) ^ ah) == 0
which is then if-converted. Modified testcase:
long long x;
_Bool __attribute__((regparm(2))) mask (long long a)
{
return (x& a) == a;
}
on i?86 gets you
mask:
.LFB0:
On Wed, Aug 10, 2011 at 1:40 PM, Richard Guenther
wrote:
> On Wed, Aug 10, 2011 at 12:29 PM, Paulo J. Matos
> wrote:
>> Hi,
>>
>> I am having a size optimisation issue with GCC-4.6.1.
>> The problem boils down to the fact that I have no idea on the best way to
>> hint to GCC that a given insn wo
On Wed, Aug 10, 2011 at 12:29 PM, Paulo J. Matos wrote:
> Hi,
>
> I am having a size optimisation issue with GCC-4.6.1.
> The problem boils down to the fact that I have no idea on the best way to
> hint to GCC that a given insn would make more sense someplace else.
>
> The C code is simple:
> int1
Hi,
I am having a size optimisation issue with GCC-4.6.1.
The problem boils down to the fact that I have no idea on the best way
to hint to GCC that a given insn would make more sense someplace else.
The C code is simple:
int16_t mask(uint32_t a)
{
return (x & a) == a;
}
int16_t is QImode
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