I had already removed all define_delay definitions in mips.md.
There were still a few leftover branches that had nop in the delay slot.
One of these cases is the first example I showed.
I solved the issue by editing the SETUP_GTX macro located in
glibc-2.3.6/sysdeps/mips/sys/asm.h
The macro was
"Brandon H. Dwiel" writes:
> I would like to make the changes necessary so that the compiler expects the
> PC of the
> instruction directly after the branch to be put in the $ra register.
>
> I cannot locate where it is specified that PC+8 of an "and link" instruction
> is to
> be put in the $r
Hello,
I am a student working on a project involving generating a MIPS processor.
We have decided to NOT implement logic to handle branch delay slots and instead
work with generating a compiler that will emit code without these delay slots.
The compiler tool chain versions are:
binutils: 2.
