On Wed, 2023-08-02 at 12:54 -0400, Vladimir Makarov wrote:
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> On 7/17/23 07:33, senthilkumar.selva...@microchip.com wrote:
> > Hi,
> >
> >The avr target has a bunch of patterns that directly set h
On 7/17/23 07:33, senthilkumar.selva...@microchip.com wrote:
Hi,
The avr target has a bunch of patterns that directly set hard regs at expand
time, like so
(define_expand "cpymemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "mem
Am 28.07.23 um 07:04 schrieb senthilkumar.selva...@microchip.com:
On Thu, 2023-07-27 at 15:11 +0200, Georg-Johann Lay wrote:
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Am 17.07.23 um 13:33 schrieb SenthilKumar.Selvaraj--- via Gcc:
Hi,
Th
On Thu, 2023-07-27 at 15:11 +0200, Georg-Johann Lay wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
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> Am 17.07.23 um 13:33 schrieb SenthilKumar.Selvaraj--- via Gcc:
> > Hi,
> >
> >The avr target has a bunch of patterns that directly set
Am 17.07.23 um 13:33 schrieb SenthilKumar.Selvaraj--- via Gcc:
Hi,
The avr target has a bunch of patterns that directly set hard regs at expand
time, like so
The correct approach would be to use usual predicates together with
constraints that describe the register instead of hard regs,
Hi,
The avr target has a bunch of patterns that directly set hard regs at expand
time, like so
(define_expand "cpymemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:HI 2 "const_int_
