Re: Incorrect use of anti-dependency to order instructions in the DFA scheduler

2005-09-05 Thread Daniel Towner
Hi all, In the end I modified TARGET_SCHED_ADJUST_COST to increase the cost of anti-dependencies between a jump and another instruction, to prevent them from being scheduled in the same cycle. This fix works well. It still allows other independent instructions to be scheduled into the same VL

Re: Incorrect use of anti-dependency to order instructions in the DFA scheduler

2005-09-01 Thread Ian Lance Taylor
Daniel Towner <[EMAIL PROTECTED]> writes: > I maintain a port for a 16-bit VLIW machine, and I have encountered a > problem with the DFA instruction scheduler. Consider the following two > instructions: > > BNE someLabel > STW R5,(R3) 0 // Mem[R3] := R5 > > The second instruction will only be e

Re: Incorrect use of anti-dependency to order instructions in the DFA scheduler

2005-09-01 Thread Richard Henderson
On Thu, Sep 01, 2005 at 11:12:51AM +0100, Daniel Towner wrote: > Why is an anti-dependence used to enforce the ordering of the branch and > the subsequent instruction? Because gcc doesn't target true vliw machines, and given strict program ordering of insn, anti-dependence is correct. > ... and

Incorrect use of anti-dependency to order instructions in the DFA scheduler

2005-09-01 Thread Daniel Towner
Hi all, I maintain a port for a 16-bit VLIW machine, and I have encountered a problem with the DFA instruction scheduler. Consider the following two instructions: BNE someLabel STW R5,(R3) 0 // Mem[R3] := R5 The second instruction will only be executed if the branch isn't taken. However, w