On Tue, May 29, 2007 at 03:56:38PM +0300, Tal Agmon wrote:
> Hi,
>
> I'm working on a new target port in which there are different base
> registers
> allowed depending on the offset:
> r0-r7 are allowed as base register only when the offset is zero.
> r6-r7 are allowed as base register for every
Hi,
I'm working on a new target port in which there are different base
registers
allowed depending on the offset:
r0-r7 are allowed as base register only when the offset is zero.
r6-r7 are allowed as base register for every offset.
I'm wondering if gcc is prepared for such scenario, examine the
