Jamie Prescott writes:
> The target reorg is great, but it had two problems for me. One is that it was
> issued after the
> prologue/epilogue,
Oh yeah, you probably do want to introduce a pass before
prologue/epilogue generation but after register allocation. There isn't
any mechanism for that
- Original Message
> From: Ian Lance Taylor
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 10:09:40 PM
> Subject: Re: Compact regsiter allocation
>
> Jamie Prescott writes:
>
> > If not, what is the best spot (in the norma
> From: Ian Lance Taylor
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 10:09:40 PM
> Subject: Re: Compact regsiter allocation
>
> Jamie Prescott writes:
>
> >> Normally gcc will allocate registers in the order they are list
Jamie Prescott writes:
>> Normally gcc will allocate registers in the order they are listed in
>> REG_ALLOC_ORDER, which defaults to increasing numeric order. gcc won't
>> normally allocate register sparsely. That said, it is quite possible
>> for gcc to allocate a register and then discover th
- Original Message
> From: Ian Lance Taylor
> To: Jamie Prescott
> Cc: gcc@gcc.gnu.org
> Sent: Thursday, May 14, 2009 8:57:08 PM
> Subject: Re: Compact regsiter allocation
>
> Jamie Prescott writes:
>
> > The VM I'm retargeting GCC to, has an in
Jamie Prescott writes:
> The VM I'm retargeting GCC to, has an instruction that allows to store/load
> multiple,
> a consecutive range of registers, to a memory operand.
> I noticed that sometime the registers allocated by GCC are sparse, and this
> prevents
> the store/load multiple optimizati
The VM I'm retargeting GCC to, has an instruction that allows to store/load
multiple,
a consecutive range of registers, to a memory operand.
I noticed that sometime the registers allocated by GCC are sparse, and this
prevents
the store/load multiple optimization from happening (I have to issue s
