2013/10/7 Jakub Jelinek :
> On Mon, Oct 07, 2013 at 01:31:29PM +0400, Ilya Enkovich wrote:
>> Seems assembler may not always detect MPX relocation. For simple calls
>> it may check for 'bnd' prefix, but for indirect call we need to
>> generate MPX relocation for 'mov' instruction storing address of
On Mon, Oct 07, 2013 at 01:31:29PM +0400, Ilya Enkovich wrote:
> Seems assembler may not always detect MPX relocation. For simple calls
> it may check for 'bnd' prefix, but for indirect call we need to
> generate MPX relocation for 'mov' instruction storing address of the
> called function. This in
2013/10/2 Ilya Enkovich :
> 2013/10/1 Jakub Jelinek :
>> On Tue, Oct 01, 2013 at 04:15:53PM +0400, Ilya Enkovich wrote:
>>> I'd like to restart discussion on this topic. I see two viable options
>>> in this thread for PLT entry for MPX.
>>>
>>> The first one is to use new relocation for calls requi
2013/10/1 Jakub Jelinek :
> On Tue, Oct 01, 2013 at 04:15:53PM +0400, Ilya Enkovich wrote:
>> I'd like to restart discussion on this topic. I see two viable options
>> in this thread for PLT entry for MPX.
>>
>> The first one is to use new relocation for calls requiring extended
>> PLT. Linker may
On Tue, Oct 01, 2013 at 04:15:53PM +0400, Ilya Enkovich wrote:
> I'd like to restart discussion on this topic. I see two viable options
> in this thread for PLT entry for MPX.
>
> The first one is to use new relocation for calls requiring extended
> PLT. Linker may decide then which PLT entries sh
Hi all,
I'd like to restart discussion on this topic. I see two viable options
in this thread for PLT entry for MPX.
The first one is to use new relocation for calls requiring extended
PLT. Linker may decide then which PLT entries should be extended and
use 16 byte entries when possible. The only
On Wed, Aug 14, 2013 at 8:49 AM, Jakub Jelinek wrote:
> On Tue, Jul 23, 2013 at 12:49:06PM -0700, H.J. Lu wrote:
>> There are 2 psABI considerations:
>>
>> 1. Should PLT entries in all binaries, with and without MPX, be changed
>> to 32-byte or just the necessary ones?
>
> Ugh, please don't.
On Tue, Jul 23, 2013 at 12:49:06PM -0700, H.J. Lu wrote:
> There are 2 psABI considerations:
>
> 1. Should PLT entries in all binaries, with and without MPX, be changed
> to 32-byte or just the necessary ones?
Ugh, please don't.
> 2. Only branch to PLT entry with BND prefix needs 32-byte P
>>> On 09.08.13 at 19:03, "H.J. Lu" wrote:
> On Fri, Aug 9, 2013 at 12:08 AM, Jan Beulich wrote:
> On 08.08.13 at 18:01, "H.J. Lu" wrote:
>>> On Thu, Aug 8, 2013 at 12:19 AM, Jan Beulich wrote:
>>> On 08.08.13 at 02:33, "H.J. Lu" wrote:
> We use the .gnu_attribute directive to reco
On Fri, Aug 9, 2013 at 12:08 AM, Jan Beulich wrote:
On 08.08.13 at 18:01, "H.J. Lu" wrote:
>> On Thu, Aug 8, 2013 at 12:19 AM, Jan Beulich wrote:
>> On 08.08.13 at 02:33, "H.J. Lu" wrote:
We use the .gnu_attribute directive to record an object attribute:
enum
{
>>> On 08.08.13 at 18:01, "H.J. Lu" wrote:
> On Thu, Aug 8, 2013 at 12:19 AM, Jan Beulich wrote:
> On 08.08.13 at 02:33, "H.J. Lu" wrote:
>>> We use the .gnu_attribute directive to record an object attribute:
>>>
>>> enum
>>> {
>>> Tag_GNU_X86_EXTERN_BRANCH = 4,
>>> };
>>>
>>> for the type
On Thu, Aug 8, 2013 at 12:19 AM, Jan Beulich wrote:
On 08.08.13 at 02:33, "H.J. Lu" wrote:
>> We use the .gnu_attribute directive to record an object attribute:
>>
>> enum
>> {
>> Tag_GNU_X86_EXTERN_BRANCH = 4,
>> };
>>
>> for the types of external branch instructions in relocatable files.
>>> On 08.08.13 at 02:33, "H.J. Lu" wrote:
> We use the .gnu_attribute directive to record an object attribute:
>
> enum
> {
> Tag_GNU_X86_EXTERN_BRANCH = 4,
> };
>
> for the types of external branch instructions in relocatable files.
>
> enum
> {
> /* All external branch instructions are l
Here is the proposal to add Tag_GNU_X86_EXTERN_BRANCH and
NT_X86_FEATURE_PLT_BND. Any comments?
--
H.J.
---
Intel MPX:
http://software.intel.com/sites/default/files/319433-015.pdf
introduces 4 bound registers, which will be used for parameter passing
in x86-64. Bound registers are cleared by
On Wed, Jul 24, 2013 at 5:23 PM, Ian Lance Taylor wrote:
>> * The foo@plt pseudo-symbols that e.g. objdump will display are based on
>> the BFD backend knowing the size of PLT entries. Arguably this ought
>> to look at sh_entsize of .plt instead of using baked-in knowledge, but
>> it doesn'
On Wed, Jul 24, 2013 at 4:36 PM, Roland McGrath wrote:
> I've read through the MPX spec once, but most of it is still not very
> clear to me. So please correct any misconceptions. (HJ, if you answer
> any or all of these questions in your usual style with just, "It's not a
> problem," I will fin
On Thu, Jul 25, 2013 at 4:08 AM, Ilya Enkovich wrote:
> 2013/7/25 Ian Lance Taylor :
>> On Wed, Jul 24, 2013 at 4:36 PM, Roland McGrath wrote:
>>>
>>> Will an MPX-using binary require an MPX-supporting dynamic linker to run
>>> correctly?
>>>
>>> * An old dynamic linker won't clobber %bndN direct
2013/7/25 Ian Lance Taylor :
> On Wed, Jul 24, 2013 at 4:36 PM, Roland McGrath wrote:
>>
>> Will an MPX-using binary require an MPX-supporting dynamic linker to run
>> correctly?
>>
>> * An old dynamic linker won't clobber %bndN directly, so that's not a
>> problem.
>
> These are my answers and
On Wed, Jul 24, 2013 at 4:36 PM, Roland McGrath wrote:
>
> Will an MPX-using binary require an MPX-supporting dynamic linker to run
> correctly?
>
> * An old dynamic linker won't clobber %bndN directly, so that's not a
> problem.
These are my answers and likely incorrect.
It will clobber the r
I've read through the MPX spec once, but most of it is still not very
clear to me. So please correct any misconceptions. (HJ, if you answer
any or all of these questions in your usual style with just, "It's not a
problem," I will find you and I will kill you. Explain!)
Will an MPX-using binary
On Wed, Jul 24, 2013 at 11:59 AM, Ian Lance Taylor wrote:
> On Wed, Jul 24, 2013 at 11:53 AM, H.J. Lu wrote:
>> On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
>>> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
http://software.intel.com/sites/default/files/319433-015.pdf
>>
On Wed, Jul 24, 2013 at 11:53 AM, H.J. Lu wrote:
> On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
>> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>>>
>>> http://software.intel.com/sites/default/files/319433-015.pdf
>>>
>>> introduces 4 bound registers, which will be used for parame
On Wed, Jul 24, 2013 at 9:45 AM, Ian Lance Taylor wrote:
> On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>>
>> http://software.intel.com/sites/default/files/319433-015.pdf
>>
>> introduces 4 bound registers, which will be used for parameter passing
>> in x86-64. Bound registers are cleared by
On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu wrote:
>
> http://software.intel.com/sites/default/files/319433-015.pdf
>
> introduces 4 bound registers, which will be used for parameter passing
> in x86-64. Bound registers are cleared by branch instructions. Branch
> instructions with BND prefix will
On Wed, Jul 24, 2013 at 1:43 AM, Florian Weimer wrote:
> On 07/23/2013 09:49 PM, H.J. Lu wrote:
>>
>> 2. Extend the current 16-byte PLT entry:
>>
>>ff 25 32 8b 21 00jmpq *name@GOTPCREL(%rip)
>>68 00 00 00 00 pushq $index
>>e9 00 00 00 00 jmpq PLT0
>>
On 07/23/2013 09:49 PM, H.J. Lu wrote:
2. Extend the current 16-byte PLT entry:
ff 25 32 8b 21 00jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to 32-byte to add BND prefix to branch
Intel MPX:
http://software.intel.com/sites/default/files/319433-015.pdf
introduces 4 bound registers, which will be used for parameter passing
in x86-64. Bound registers are cleared by branch instructions. Branch
instructions with BND prefix will keep bound register contents. This leads
to 2 re
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